D Board P1 And P2 - Sony TRINITRON BVM-D9H1U Maintenance Manual

6-5. D Board P1 and P2

1. D board - P1
The P1 block of the D board is the DC-DC converter
circuit that generates the following power voltages to be
used in the monitor: Standby 5 V (abbreviated as ST5
hereafter), +/- 12 V, +/- 6 V, +/- 5 V, + 24 V and the
floating power source (HC+, HC-, HC N) for the H.
CENTER circuit.
The DC-DC converter receives the DC power input (the
DC input voltage line is called DC. IN) from various
sources such as the DC input that is generated by the
external power supply board (G board) or the DC input
from lithium-ion battery or the DC input that is directly
supplied from any external DC power supplies. The
acceptable range of the DC. IN input voltage is from 11 V
to 17 V. The DC. IN input voltage is compared with the
output of the shunt regulator IC1601 by the comparator
Q1601. When the DC voltage of 11 V or less or 17 V or
higher is input, the relay RY1601 that is inserted in the
input line, is activated to turn off the DC power input in
order to protect the subsequent circuit from being dam-
aged. The DC voltage that is supplied from the power
supply board is 13 V.ST5V is generated by the PWM
controller consisting of IC1602 and FET Q1604 that is a
regulator. The output voltage from the regulator is volt-
age-divided and is compared with the reference voltage
that is created by IC1601, by the comparator IC1602. The
error output from the comparator controls the ON time of
the pulse amplitude (frequency of the pulse is about 66
kHz) that is applied to Q1604 gate. ST5V is always output
whenever the DC. IN voltage is input, and does not
depends upon the POWER switch operation. The circuit
Q1608 to Q1610 is the switch that turns off the PWM IC
output when the DC. IN input voltage is outside the
operating range of this regulator circuit. Q1611 to Q1613
are the transistors to drive Q1614.
+6 V power is generated by the PWM controller IC2601
and the regulator FET Q2607. -6 V power is generated by
the PWM controller IC2601 and the regulator FET Q2612.
± 6 V power depends on the POWER switch. Output of
the ± V power is controlled by the control signal that is
supplied from microprocessor. When the POWER switch
is turned off, output from IC2601 is turned off by Q1617,
Q2601 to Q2603 so that ± 6 V power output is turned off.
± 5 V power is generated by the 3-terminal regulator
IC2602 and IC2603 from the ± 6 V input power.
± 12 V power is generated by the PWM controller IC3601
and regulator FET Q3607, Q3609 and Q3613.
6-4
This output is also controlled by the output signal from
microprocessor in the same manner as in the case of ± 6 V
power.
The floating power voltages (HC+, HC_ and HC N) are
generated by rectifying and smoothing out the output
voltage form the secondary winding of the transformer
T3601 that receives the DC. IN voltage to its primary
winding after the DC. IN voltage is switched by the +12 V
regulator FET.
24 V power is generated by rectifying and smoothing out
the voltage that is induced across pin-5 and pin-6 of T3601
that receives the input power at its primary winding pin-7.
2. D board - P2
The P2 block of the D board consists of the horizontal and
vertical sync signal processing, sync signal delay process-
ing, deflection system control, BLKG signal processing,
+B power supply circuit for horizontal output, horizontal
and vertical output circuits and the H. CENTER circuit.
. . . . . Sync Signal Processing, Sync Signal Delay Processing
and Deflection System Control Circuits
The horizontal and vertical sync signals that are input
from CN2501 (pins-1/-2) are sent to the H/V DELAY
timing circuit consisting of IC2513, IC2512, IC2509 and
IC2519. The H/V DELAY timing circuit outputs the
signal that repeats H/L at every half-cycle of the H. and
V. input signals. This output signal is shaped of its
pulse-width by IC2505 and is sent to IC2503 that is the
deflection system signal processing IC. During normal
operation of the monitor, the H/V DELAY timing circuit
outputs the sync signals that have the same phase as
those of the input signal. However, during the H.
DELAY mode and the V. DELAY mode, the signal that
is inverted of its phase by IC2517 and IC2516 is input to
IC2505, the output sync signals are generated from the
edges that correspond to the half-cycle of both horizontal
and vertical periods. Thus the H. DELAY and the V.
DELAY are realized.
The deflection signal processor IC2503 (TDA9106)
outputs the various signals that are required for deflec-
tion, such as horizontal drive signal, parabola signal for
dynamic focusing, parabola signal for picture distortion
correction, vertical drive signal and H/V blanking
signals. These output signals are controlled directly by
the microprocessor in the MA board through I2C bus.
The horizontal free-running frequency is set for about 18
kHz. The pull-in range of the input signal frequency is
from 15 kHz to 45 kHz.
BVM-D9H1U/D9H5U/D9H1E/D9H5E/D9H1A/D9H5A