IC
UPD4702G-E2 (NEC)
8-BIT UP DOWN COUNTER (ROTARY ENCODER)
—TOP VIEW—
RESET
1
20
A
2
19
B
3
18
NC
4
17
CD0
(
) CD0
5
16
CD1
(
) CD1
6
15
CD2
(
) CD2
7
14
CD3
(
) CD3
8
13
NC
9
12
GND
10
11
1
RESET
2
A
PHASE DISCRIMINATION
EDGE DETECTION
3
B
XC18V02VQ44C (XILINX)
PROGRAMMABLE CONFIGURATION PROM
—TOP VIEW—
34
35
36
37
38
39
40
41
42
43
44
PIN
PIN
I/O
SIGNAL
I/O
NO.
NO.
1
—
NC
12
—
2
—
NC
13
I
3
I
TDI
14
O
4
—
NC
15
I
5
I
TMS
16
—
6
—
GND
17
—
7
I
TCK
18
—
8
—
V
19
O
CC
9
O
D4
20
—
CF
10
O
21
O
11
—
NC
22
—
2-20
INPUTS
A, B
: TWO-PHASE INCREMENTAL SIGNAL
V
CC
OE
: OUTPUT ENABLE
CARRY
RESET
: COUNTER RESET
STB
: LATCH STROBE SIGNAL
BORROW
OUTPUTS
BORROW
STB
: BORROW PULSE
CARRY
: CARRY PULSE
CD0
CD7
CD0 - CD7,
-
: COUNT DATA
OE
OTHER
CD7
CD7 (
)
NC
: NO CONNECTION
CD6
CD6 (
)
CD5
CD5 (
)
CD4
CD4 (
)
NC
19
CARRY
8-BIT UP/DOWN
COUNTER
18
BORROW
17
STB
8-BIT LATCH
THREE-STATE
16
OUTPUT
OE
5 - 8, 12 - 15
CD0
CD0 (
) - CD7 (
INPUTS
CE
: CHIP ENABLE
CLK
: CLOCK
RESET
OE/
: OUTPUT ENABLE/
22
ADDRESS COUNTER RESET
21
TCK
: TEST CLOCK
20
TDI
: TEST DATA
19
TMS
: TEST MODE SELECT
18
17
OUTPUTS
16
CEO
: CHIP ENABLE OUTPUT
15
CF
: CONFIGURATION DATA
14
D0 - D7
: DATA
13
TDO
: TEST DATA
12
OTHER
NC
: NO CONNECTION
PIN
PIN
SIGNAL
I/O
SIGNAL
I/O
SIGNAL
NO.
NO.
NC
23
—
NC
34
—
RESET
OE/
24
—
NC
35
—
D6
25
O
D5
36
—
CE
26
—
V
37
—
CC
V
27
O
D3
38
—
CC
V
28
—
GND
39
—
CC
GND
29
O
D1
40
O
D7
30
—
NC
41
—
NC
31
O
TDO
42
O
CEO
32
—
NC
43
I
NC
33
—
NC
44
—
XC9572XL-10VQ64C (XILINX)
ECC DECODE PRE-PROCESSOR
—TOP VIEW—
52
53
54
55
56
57
58
59
60
61
62
63
64
PIN
I/O
NO.
1
I/O
2
I/O
3
—
V
4
I/O
5
I/O
6
I/O
7
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
—
15
I/O
CD7
)
16
I/O
INPUTS/OUTPUTS
I/O
I/O/GCK1 - I/O/GCK3
I/O/GSR
I/O/GTS1 - I/O/GTS2
OTHERS
TCK
TDI
TDO
TMS
TCK, TDI, TMS
TDO
NC
V
CC
V
CC
NC
V
CC
NC
D0
GND
D2
CLK
NC
I/O/GCK1 - I/O/GCK3
I/O/GSR
I/O/GTS1, I/O/GTS2
PIN
PIN
SIGNAL
I/O
SIGNAL
I/O
NO.
NO.
I/O
17
I/O
I/O/GCK3
33
I/O
I/O/GTS2
18
I/O
I/O
34
I/O
3.3V
19
I/O
I/O
35
I/O
CCINT
I/O
20
I/O
I/O
36
I/O
I/O/GTS1
21
I/O
GND
37
—
I/O
22
I/O
I/O
38
I/O
I/O
23
I/O
I/O
39
I/O
I/O
24
I/O
I/O
40
I/O
I/O
25
I/O
I/O
41
—
I/O
26
—
V
2.5V/ 3.3V
42
I/O
CCIO
I/O
27
I/O
I/O
43
I/O
I/O
28
—
TDI
44
I/O
I/O
29
—
TMS
45
I/O
GND
30
—
TCK
46
I/O
I/O/GCK1
31
I/O
I/O
47
I/O
I/O/GCK2
32
I/O
I/O
48
I/O
: INPUT/OUTPUT
: GLOBAL CONTROL
: GLOBAL CONTROL
: GLOBAL CONTROL
: TEST CLOCK
: TEST DATA INPUT
: TEST DATA OUTPUT
: TEST MODE SELECT
28 - 30
3
JTAG
IN-SYSTEM PROGRAMMING CONTROLLER
53
1
CONTROLLER
8 - 13,
18
15 - 20,23
13
I/O
1,2,4 - 7,
58 - 64
18
13
I/O
I/O
BLOCKS
22,24,25,
27,31 - 36,
38 - 40,42
18
14
I/O
43 - 52,
56,57
18
12
I/O
15,16,17
3
64
1
2,5
2
32
31
30
29
28
27
26
25
24
23
22
21
20
PIN
SIGNAL
I/O
SIGNAL
NO.
I/O
49
I/O
I/O
I/O
50
I/O
I/O
I/O
51
I/O
I/O
I/O
52
I/O
I/O
V
3.3V
53
—
TDO
CCINT
I/O
54
I/O
I/O
I/O
55
—
V
2.5V/ 3.3V
CCIO
I/O
56
—
GND
GND
57
I/O
I/O
I/O
58
I/O
I/O
I/O
59
I/O
I/O
I/O
60
I/O
I/O
I/O
61
I/O
I/O
I/O
62
I/O
I/O
I/O
63
I/O
I/O
I/O
64
I/O
I/O/GSR
FUNCTION
54
BLOCK 1
MACROCELLS
1 TO 18
FUNCTION
54
BLOCK 2
MACROCELLS
1 TO 18
FUNCTION
54
BLOCK 3
MACROCELLS
1 TO 18
FUNCTION
54
BLOCK 4
MACROCELLS
1 TO 18
HDW-750 V2