Schematic Diagram - Dmb12 Board (2/6) - Sony HCD-X1V Service Manual

7-9. SCHEMATIC DIAGRAM – DMB12 Board (2/6) –
(2/6)
AGND
VOA C120 1
DVDA
VOB C121 1
DVDB
VOC C122 1
DVDC
VOD C123 1
DVDD
DVDRFIP
C124 DVDRFIN
1
MA
MB
MC
MD
SA
C125
SB
0.1
SC
SD
SDFON
SDFOP
VOE
TNI
VOF
TPI
PD
MDI1
MDI2
LDO2
LDO2
LDO1
LDO1
SVDD3
CSO
C118 C117
10 C115 10 C114
RFLVL
16V 0.1 16V 0.1
SGND
V2REFO
V2REFO
V2O
V2O
VREFO
VREFO
C119
FEO
C116 10
0.1 16V
TEO
C126 0.1
TEZISLV
OPOUT
OP_INN
C199
0.0047
OP_INP
DMO
DMO
FMO
FMO
TROPENPWM
IOPMON
IOPMON
TRO
TRO
FOO
FOO
USB_VSS
C127 0.01
USBP
USBM
USB_VDD3
SPFG
SPFG
MSW
MSW
R130 R135 CKSW
0.01
10k
R1177
OCSW
100
EEWP
EEWP
DVDD18
A2
HA2
A3
HA3
A4
HA4
A5
HA5
A6
HA6
A7
HA7
A8
HA8
A18
HA18
A19
HA19
DVSS
R103 0 C128 0.0015
APLLCAP
APLLVSS
(Page
40)
A1
A2
A3
HCD-X1V
•
• See page 81 for IC Pin Function Description.
See page 72 for Waveforms.
FB107
C133 C147 C148
0.1 0.047 0.047
RF AMP,SERVO DSP,MPEG DECODER
IC101
CXD9804R
R1201
3.3k
R1400
R1120 R1121 R1122 R1123 R1124 R1125
R1102 R192 R189
150 150 150
C163
0.01
CIN
R1101 2.2k
FS
DACVDDC
R174 0
DAVCC
XDACS
R175
0
ADSDO
R1179 100 C1103
FWD
R171 100 C1104
REW
R1185 100
MUTE123
R1184 100
MUTE
C171
DVDD3
R140 10k R133 0
TSD_M
R170 10k
ADSCK
R138 100 C1107
WIDE
R1183 220
VCLK
SMPTE_Y(0)
SMPTE_Y(1)
DVSS
SMPTE_Y(2)
C172 0.01
DVDD18
SMPTE_Y(3)
SMPTE_Y(4)
SMPTE_Y(5)
SMPTE_Y(6)
SMPTE_Y(7)
DVDD3
RA4
RA5
RA6
DVSS
RA7
DVSS
RA8
RA9
RA11
CKE
R1114 22
DRCLK
C174 0.01
DVDD3
RCLKB
RVREF
C175 0.01
DVDD18
RA3
RA2
RA1
DVSS
RA0
RA10
BA1
DVSS
BA0
RCS
C176 0.01
DVDD3
RAS
CAS
RWE
DQM1
R139 0
LINYSW
RD8
C173 0.001
DVSS
RD9
RD10
RD11
RD12
RD13
FB115
R156
100
RB112 RB113
0 0
41 41
RF
RF
V2REFO
V2REFO
V2O
V2O
LDO2
LDO2
LDO1
LDO1
PD
PD
XTALI
XTALI
XMAMUTE
XMAMUTE
XIF5SY
XIF5SY
XRST
XRST
SDA
SDA
XSYSRST
XSYSRST
SCL
SCL
IFSOI
IFSOI
XIFCS
XIFCS
IFSCK
IFSCK
IFSDO
IFSDO
TXD
TXD
RXD
(Page 40)
RXD
MSW
MSW
EEWP
EEWP
0.001
VOA
VOA
0.001
VOB
VOB
C1105 0.001
MUTE123 VOC
VOC
C1106 0.001 MUTE VOD
VOD
0.01 VOE
VOE
TSD_M VOF
VOF
0.001
WIDE DMO
DMO
VCLK FMO
FMO
RB116 47
YUV0 IOPMON
IOPMON
YUV1 TRO
TRO
YUV2 FOO
FOO
YUV3 SPFG
SPFG
VREFO
VREFO
MUTE123
MUTE123
RB117 47
YUV4 MUTE
MUTE
YUV5 TSD_M
TSD_M (Page 42)
YUV6 LIMITSW
LIMITSW
YUV7
RB114 0
RA4 SPDIF
SPDIF
RA5 ASDATA2
ASDATA2
RA6 ASDATA1
ASDATA1
RA7 ASDATA0
ASDATA0
ACLK
ACLK
ABCK
ABCK
RB115 0
RA8 ALRCK
ALRCK
RA9 CR/R
CR/R
RA11 CB/B
CB/B
CLKE Y/G
Y/G (Page 43)
DRCLK V
V
C
C
Y
Y
WIDE
WIDE
RB104 0
RA3 SPDIF
SPDIF
RA2 ASDATA4
ASDATA4
RA1 ASDATA2
ASDATA2
RA0 ASDATA1
ASDATA1
ASDATA0
ASDATA0
RB103 0 RA10 ACLK
ACLK
BA1 ABCK
ABCK
BA0 ALRCK
ALRCK
RCS HSYNC
HSYNC
VSYNC
VSYNC
VCLK
VCLK
RB111 0 RAS YUV0
YUV0
CAS YUV1
YUV1
(Page 44)
RWE YUV2
YUV2
DQM1 YUV3
YUV3
LIMITSW
YUV4
YUV4
YUV5
YUV5
RB109 0 RD8 YUV6
YUV6
RD9 YUV7
YUV7
RD10
RD11
XSMCS
XSMCS
RB110 0 RD12
SMSDO
SMSDO
RD13
SMSDI
SMSDI
RD14
SMSCK
SMSCK
RD15 VSYNC
VSYNC
GND
(Page 45)
A4
A5
A6
A7
A8
A9
A10
A11
(Page 40)
A12
A13
HCD-X1V