JVC LT-37M60BU Service Manual page 10

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2.6.3 SUB (CHASSIS) CPU PIN FUNCTION [IC7001 : DIGITAL SIGNAL PWB]
Pin Pin name I/O
1 LB_PRO O Not used
2 P_MU O Picture muting [Muting = H]
3 JP_CSB O Not used (NC)
4 A_MU O Audio muting [Muting = H]
5 M_MU O Audio muting (for AUDIO OUT) [Muting = H]
6 PC_SEL O RGB(PC) INPUT select
7 ON_TIMER O POWER INDICATOR (LED) brightness [LOW = L]
8 ILA0 O LCD back light lighting
9 ILA1 O LCD panel overshoot refresh timing
10 ILA2 O Not used
11 POW_LED O POWER LED lighting [ON = H]
12 WORD O Not used
13 MI_CK I Clock for main CPU communication
14 MI_TX I Data receive for main CPU communication
15 MI_RX O Data transmission for MAIN CPU communication
16 MI_REQ O Data request for main CPU communication [Request = L]
17 VDD I 3.3V power supply
18 FOSC O Not used (NC)
19 VSS - GND
20 X1 I Not used : Low speed oscillatior
21 X0 O Not used : Low speed oscillatior
22 VDD I 3.3V power supply
23 OSC1 I System clock osillation (crystal) : 16MHz
24 OSC0 O System clock osillation (crystal) : 16MHz
25 MODE I Single chip mode
26 BS1.5CTL O Not used : Digital tuner power / reset control
27 A92RES O Reset for IC1001(3D YC SEP / COLOUR DEMODULAT) [Reset = H]
28 BS_RST O Not used : Reset for Digital tuner power / reset control
29 LIP_RST O Not used : Reset for Sound delay (Lip sync)
30 SOFT_OFF O Not used
31 VMUTE I Picture muting request from digital tuner
32 VOUTENB O Not used : Video cutoff for digital tuner
33 MDR_CON I Not used: System cable connection monitor for PDP
34 AVDD I 3.3V power supply
35 BS_POW O Not used : Digital tuner power control
36 DsyncSW2 O Sync select for DIGITAL-IN [Cotrolled with 99-pin]
37 LB_POW O Power control for low bias line
38 NC O Not used (NC)
39 HOTPLUG I Not used : Video communiation monitor for receiver unit (PDP)
40 MECA_SW I Mechanical monitor for POWER switch [Push = L]
41 MAIN_POW O Main power control [ON = L]
42 MSP_RST O AUDIO OUT output mode select [VARIABLE = L]
43 VREF- I Not used
44 AFT2 I Not used : AFT voltage for sub tuner
45 AFT1 I AFT voltage for VHF/UHF tuner
46 KEY2 I Key scan data for front switch (MENU/CH+/CH-)
47 KEY1 I Key scan data for front switch (VOL+/VOL-)
48 NC O Not used (NC)
49 NC O Not used (NC)
50 AC_IN I Not used : AC 50/60Hz detect
1-10 (No.YA360)
Function Pin
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Digitized in Heiloo Netherland
Pin name I/O
BS_TXD O Not used : Data transmission for digital tuner communication
BS_RXD I Not used : Data receive for digital tuner communication
NC O Not used (NC)
VREF+ I 3.3V power supply
PDP_TX O Data transmission for SUB (DRIVE) CPU communication
PDP_RX I Data receive for SUB (DRIVE) CPU communication
SDA0 I/O Data for Inter IC (serial) bus : EEP-ROM (IC7002)
SCL0 O Clock for Inter IC (serial) bus : EEP-ROM (IC7002)
SDA_DVI I/O Not used : Data for Inter IC (serial) bus for panel communication
SCL_DVI O Not used : Clock for Inter IC (serial) bus for panel communication
AVSS - GND
DIGII_PHOT I Photo sensor for DIGITAL-IN illegal copy protection
AGC I Not used
EXT_YS1 I Not used
EXT_YS2 I Not used
VDD I 3.3V power supply
DIGI_PRO O Not used : For DIGITAL-IN (HDMI)
GCR_RST O Not used (NC)
GR_ON O Not used (NC)
SYNC_SEL O Not used : Sync select for digital tuner
NC O Not used (NC)
NC O Not used (NC)
SBD5 I/O Not used : Data for writing on board (connect CN01P : for Frash ROM type)
SBT5 I Not used : Clock for writing on board (connect CN01P : for Frash ROM type)
NMI I 3.3V power supply
COMP I Not used : AV COMPULINK lll control
REMO I Remote control
VSYNC I V. sync pulse
WAKE I Reset for sub(chassis) CPU
POWERGOOD I Power error detection [NG = H]
NC O Not used (NC)
RST I Reset for MAIN CPU [Reset = L]
VDD I 3.3V power supply
SCL3A O Clock for Inter IC (serial) bus control
SDA3A I/O Data for Inter IC (serial) bus control
SCL3B O Clock for Inter IC (serial) bus control
SDA3B I/O Data for Inter IC (serial) bus control
DIGI_SYNCSEL O Not used
DIGI_LRSW O Not used : For DIGITAL-IN (HDMI)
DIGI_INT I Reset for HDMI process [Reset = L ]
DVI_RST O Not used : Reset for DVI format conversion
VSS - GND
SCL5055 O Clock for Inter IC (serial) bus : JCC5055 (DIST process)
VFORMATSEL O Not used : Digital tuner clock control
SDA5055 I/O Data for Inter IC (serial) bus : JCC5055 (DIST process)
OSD_MODE_SEL O Not used : OSD mode select
NC O Not used (NC)
15K/OTH O Main video select [Fixed = H]
DsyncSW1 O Sync select for DIGITAL-IN [Cotrolled with 36-pin]
57 BUSY I Busy monitor for IC4001 (New DIST process)
4/19/2017
Function