Sony HCD-PX5 Service Manual page 85

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Pin No. Pin Name
44 XCAS
45 A09
46 XRAS
47 XWE
48 D1
49 D0
50 D2
51 D3
52 MVCI
53 ASYO
54 ASYI
55 AVDD
56 BIAS
57 RFI
58 AVSS
59 PCO
60 FILI
61 FILO
62 CLTV
TE
L 13942296513
63 PEAK
64 BOTM
65 ABCD
66 FE
67 AUX1
68 VC
69 ADIO
70 AVDD
71 ADRT
72 ADRB
73 AVSS
74 SE
75 TE
76 DCHG
77 TEST4
78 ADFG
79 F0CNT
80 XLRF
81 CKRF
82 DTRF
83 APCREF
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84 TEST0
85 TRDR
.
86 TFDR
87 DVDD
88 FFDR
* I (S) stands for schmitt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.
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I/O
O Column address strobe signal output to the D-RAM (IC152) "L" active
O Address signal output to the D-RAM (IC152)
O Row address strobe signal output to the D-RAM (IC152) "L" active
O Write enable signal output to the D-RAM (IC152) "L" active
I/O
I/O
Two-way data bus with the D-RAM (IC152)
I/O
I/O
I (S)
Digital in PLL oscillation input from the external VCO Not used (fixed at "L")
O Playback EFM full-swing output terminal
I (A) Playback EFM asymmetry comparator voltage input terminal
— Power supply terminal (+3.3V) (analog system)
I (A) Playback EFM asymmetry circuit constant current input terminal
I (A) Playback EFM RF signal input from the CXA2523AR (IC101)
— Ground terminal (analog system)
O (3) Phase comparison output for master clock of the recording/playback EFM master PLL
I (A) Filter input for master clock of the recording/playback master PLL
O (A) Filter output for master clock of the recording/playback master PLL
I (A) Internal VCO control voltage input of the recording/playback master PLL
I (A) Light amount signal (RF/ABCD) peak hold input from the CXA2523AR (IC101)
I (A) Light amount signal (RF/ABCD) bottom hold input from the CXA2523AR (IC101)
I (A) Light amount signal (ABCD) input from the CXA2523AR (IC101)
I (A) Focus error signal input from the CXA2523AR (IC101)
I (A) Auxiliary signal (I
I (A) Middle point voltage (+1.65V) input from the CXA2523AR (IC101)
O (A) Monitor output of the A/D converter input signal Not used (open)
— Power supply terminal (+3.3V) (analog system)
I (A) A/D converter operational range upper limit voltage input terminal (fixed at "H" in this set)
I (A) A/D converter operational range lower limit voltage input terminal (fixed at "L" in this set)
— Ground terminal (analog system)
I (A) Sled error signal input from the CXA2523AR (IC101)
I (A) Tracking error signal input from the CXA2523AR (IC101)
I (A) Connected to the +3.3V power supply
I Input terminal for the test Not used (fixed at "H")
ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the CXA2523AR (IC101)
I (S)
O Filter f0 control signal output to the CXA2523AR (IC101)
O Serial data latch pulse signal output to the CXA2523AR (IC101)
O Serial data transfer clock signal output to the CXA2523AR (IC101)
O Writing serial data output to the CXA2523AR (IC101)
Control signal output to the reference voltage generator circuit for the laser automatic power
O
control
x O ao Input terminal for the test Not used (open) u163
y
O Tracking servo drive PWM signal (–) output to the BH6511FS (IC141)
i
O Tracking servo drive PWM signal (+) output to the BH6511FS (IC141)
— Power supply terminal (+3.3V) (digital system)
O Focus servo drive PWM signal (+) output to the BH6511FS (IC141)
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2 9
8
Description
Q Q
3 6 7 1 3 1 5
signal/temperature signal) input from the CXA2523AR (IC101)
3
co
.
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9
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