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KD-S871R
TC9462F(IC541): DSP & DAC
1.Pin layout & Block Diagram
80
79
78
77
DV
81
SR
RO
82
LPF
DV
83
DD
DVR
84
LO
85
DV
86
SL
TEST1
87
TEST2
88
TEST3
89
BUS0
90
Micon
BUS1
91
interface
BUS2
92
BUS3
93
V
94
DD
V
95
SS
BUCK
96
CCE
97
TEST4
98
TSMOD
99
RST
100
1
2
3
4
2.Pin function
PIN No.
SYMBOL
1
TEST0
2
HSO
3
UHSO
EMPH
4
LRCK
5
V
6
SS
BCK
7
AOUT
8
DOUT
9
MBOV
10
IPF
11
12
SBOK
13
CLCK
14
V
DD
15
V
SS
16
DATA
17
SFSY
18
SBSY
19
SPCK
20
SADA
21
COFS
22
MONIT
23
V
DD
24
TESIO0
25
P2V
REF
1-22
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76
75
74
73
72
71
70
69
68
1bit
Clock
DAC
generator
Address circuit
Correction
circuit
16KRAM
Audio out
Digital out
circuit
5
6
7
8
9
10
11
12
13
I/O
FUNCTIONAL DESCRIPTION
-
Non connected
-
Non connected
-
-
Non connected
Non connected
-
Digital GND terminal.
--
-
Non connected
Non connected
-
Non connected
-
Non connected
-
Non connected
-
Non connected
-
Non connected
-
--
Digital power supply voltage terminal.
--
Digital GND terminal.
-
Non connected
Non connected
-
-
Non connected
-
Non connected
-
Non connected
-
Non connected
-
Non connected
--
Digital power supply voltage terminal.
Test input/output terminal.Normally,keep at "L" level.
I
The terminal that inputted the clock for read of text data by command.
--
PLL double reference voltage supply terminal.
manuals search engine
67
66
65
64
63
62
61
60
59
Servo
control
ROM
Digital equalizer
Automatic adjustment
RAM
circuit
CLV servo
Synchronous
guarantee
EFM decode
Sub code
decoder
Status
14
15
16
17
18
19
20
21
22
58
57
56
55
54
53
52
51
PWM
D/A
+
-
+
A/D
-
+
-
Data
slicer
VCO
+
PLL
-
TMAX
23
24
25
26
27
28
29
30
REMARKS
With pull-up resistor.
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
50 V
REF
49 TRO
48 FOO
47
TEZI
46 TEI
45 TSIN
44 SBAD
43 FEI
42 RFRP
41 RFZI
40 RFCT
39 AV
DD
38 RFI
37 SLCO
36 AV
SS
35 VCOF
34 VCOREF
33 PV
REF
32 LPFO
31 LPFN
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