D-Board (3 Of 8) Schematic Diagram - Panasonic TH-50PF10UK Service Manual

High definition plasma display, gpf10d chassis
Table of Contents

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12.25. D-Board (3 of 8) Schematic Diagram

11
FPGA
SC_PULSE
FP_CL
IC9500
G11
-
CL
FP_CLK
IC9500
G10
-
CLK
FP_SIU
IC9500
F10
-
SIU
FP_SID
IC9500
F9
-
SID
FP_SCSU
IC9500
D10
-
SCSU
FP_CEL2
IC9500
D9
-
CEL2
FP_CPH
IC9500
D8
-
CPH
FP_CEL
IC9500
B10
-
CEL
FP_DRV_RST_O
IC9500
A10
-
DRV_RST_O
FP_CSL
IC9500
B9
-
CSL
FP_CSH
IC9500
A9
-
CSH
FP_CML
IC9500
B8
-
CML
FP_CMH
IC9500
A8
-
CMH
12
13
XRST
14
IC9500
T12
-
XRST
P3.3V
R9530
10k
IC9500
M13
nSTATUS
IIC
R9244
100
IC9500
A11
-
SCL
OTHER
IC9500
A12
-
SDA
FVSEL
R9245
100
LVDSBIT
SOS9_CONF
INEXCH
R9526
0
16
P3.3V
R9875
10k
NCS
MODEL SELECTION
DATA0
*R9647
10k
IC9500
L12
-
MODEL[2]
ASDIO
*R9640
P3.3V
10k
MODEL[1]
IC9500
D14
-
DCLK
*R9618
10k
R9070
IC9500
D13
-
MODEL[0]
R9877
10k
17
TH-50PF10UK
D-Board (3 of 8) Schematic Diagram
19
20
P3.3V
GND
LVDS_INPUT
R9529
10k
R9604
IC9500
A1
GND
IC9500
J3
GND
LVDS_DET
0
IC9500
H13
-
LVDS_DET
IC9500
A16
GND
IC9500
J8
GND
RE_E+
IC9500
B2
GND
IC9500
J9
GND
IC9500
P15
-
RE_E-
IC9500
B15
GND
IC9500
J14
GND
IC9500
P16
-
RD_E+
IC9500
C8
GND
IC9500
K9
GND
IC9500
N15
-
RD_E-
IC9500
C9
GND
IC9500
L5
GND_PLL1
IC9500
N16
-
RC_E+
IC9500
D12
GND_PLL2
IC9500
M6
GNDA_PLL1
IC9500
M15
-
RC_E-
IC9500
E8
GND
IC9500
M8
GND
IC9500
M16
-
RB_E+
IC9500
E9
GND
IC9500
M9
GND
IC9500
L15
-
RB_E-
IC9500
E11
GNDA_PLL2
IC9500
N5
GND_PLL1
IC9500
L16
-
RA_E+
IC9500
F12
GND_PLL2
IC9500
P8
GND
IC9500
K15
-
RA_E-
IC9500
G8
GND
IC9500
P9
GND
IC9500
K16
-
RCLK_E+
IC9500
H3
GND
IC9500
R2
GND
IC9500
J15
-
RCLK_E-
IC9500
H8
GND
IC9500
R15
GND
IC9500
J16
-
IC9500
H9
GND
IC9500
T1
GND
RCLK_0+
IC9500
H16
-
IC9500
H14
GND
IC9500
T16
GND
RCLK_0-
IC9500
H15
-
IC9500
H1
-
RE_0+
IC9500
G16
-
IC9500
J1
-
RE_0-
IC9500
G15
-
IC9500
H2
-
RD_0+
IC9500
F16
-
IC9500
J2
-
RD_0-
IC9500
F15
-
RC_0+
IC9500
E16
-
RC_0-
IC9500
E15
-
RB_0+
IC9500
D16
-
RB_0-
IC9500
D15
-
P3.3V
RA_0+
IC9500
C16
-
RA_0-
IC9500
C15
-
R9543
R9544
10k
10k
R9507
56
TDI_TO_68_L
TDO_TO_FPGA
CONTROL
TMS
IC9500
E13
-
FVSEL
TCK
IC9500
H11
-
LVDSbit
PSTB
IC9500
D11
-
p_stb
R9542
IC9500
E14
-
K_DONE
68
PDB1
IC9500
C12
-
p_db1
C9532
PDB0
50V
IC9500
B12
-
p_db0
100p
PSLCT
IC9500
C11
-
p_slct
PBUSY
IC9500
B11
-
p_busy
IC9500
H12
-
INEXCH
RESET
DRVMUTE
IC9500
DRVRST
IC9500
J13
MSEL0
MSEL0
IC9500
NRST
IC9500
K12
MSEL1
IC9500
MSEL1
R9630
TP
10k
IC9500
N3
-
Nosync
IC9500
K1
-
PRCK84M
LSI58 Communication
IC9500
N13
INT_DONE
LATCH
R9536
47
R9534
R9876
SFVRST
10k
SFRST
NC
IC9500
C14
-
FPDAT1
IC9500
F4
nCSO
FPDAT0
IC9500
F14
-
IC9500
F1
DATAO
EXB38V470JV
IC9500
J11
-
R9535
FPCLK
IC9500
L13
CONF_DONE
IC9500
J12
-
47
IC9500
J5
nCONFIG
IC9500
L14
-
IC9500
C3
ASDO
IC9500
M14
-
IC9500
G5
nCE
IC9500
P14
-
IC9500
N14
nCEO
IC9500
H4
DCLK
47
21
22
P3.3V
FL9504
VCCINT
F1J1E1040022
VCCI
L8L1.2V
C9531
G
6.3V
C9516
10u
1
3
0.1u
G
2
IC9500
A2
VCCIO2
16V
IC9500
A15
VCCIO2
C9517
0.1u
IC9500
B1
VCCIO1
C9526
16V
L9501
6.3V
J0JHC0000078
IC9500
B16
VCCIO3
10u
C9523
0.1u
IC9500
E12
VCCA_PLL2
C9518
0.1u
16V
IC9500
C7
VCCIO2
16V
IC9500
G9
VCCINT
IC9500
C10
VCCIO2
C9524
L9502
0.1u
IC9500
F11
VCCD_PLL2
C9519
0.1u
16V
J0JHC0000078
IC9500
E7
VCCIO2
16V
IC9500
H7
VCCINT
IC9500
E10
VCCIO2
C9525
0.1u
L9504
IC9500
L6
VCCD_PLL1
C9520
0.1u
16V
J0JHC0000078
IC9500
G3
VCCIO1
16V
IC9500
H10
VCCINT
IC9500
G14
VCCIO3
L9505
C9527
0.1u
IC9500
M5
VCCA_PLL1
C9521
0.1u
16V
J0JHC0000078
IC9500
K3
VCCIO1
16V
IC9500
J7
VCCINT
IC9500
K14
VCCIO3
C9528
0.1u
C9522
IC9500
J10
VCCINT
0.1u
16V
IC9500
M7
VCCIO4
16V
IC9500
K8
VCCINT
IC9500
M10
VCCIO4
C9559
0.1u
IC9500
P7
VCCIO4
16V
IC9500
P10
VCCIO4
C9560
0.1u
IC9500
R1
VCCIO1
16V
IC9500
R16
VCCIO3
C9561
0.1u
IC9500
T2
VCCIO4
16V
IC9500
T15
VCCIO4
PICTURE_OUTPUT(R)
PICTURE_OUTPUT(L)
/FLASH_CONTROL
R9612
JTAG
EXB2HV470JV
L8R_RI0
L8L_RI0
IC9500
T11
-
RR[0]/A0
L8R_RI1
L8L_RI1
IC9500
H5
TDI
IC9500
R11
-
RR[1]/A1
R9506
L8R_RI2
L8L_RI2
22
IC9500
P11
-
RR[2]/A2
IC9500
G2
TDO
L8R_RI3
L8L_RI3
IC9500
N11
-
RR[3]/A3
L8R_RI4
L8L_RI4
IC9500
G1
TMS
IC9500
M11
-
RR[4]/A4
L8R_RI5
L8L_RI5
IC9500
L11
-
RR[5]/A5
IC9500
F2
TCK
L8R_RI6
L8L_RI6
IC9500
K11
-
RR[6]/A6
L8R_RI7
L8L_RI7
IC9500
T10
-
RR[7]/A7
R9613
EXB2HV470JV
L8R_RI8
L8L_RI8
IC9500
R10
-
RR[8]/A8
L8R_RI9
L8L_RI9
IC9500
N10
-
RR[9]/A9
L8R_GI0
L8L_GI0
IC9500
L10
-
GR[0]/A10
L8R_GI1
L8L_GI1
IC9500
K10
-
GR[1]/A11
G13
-
DRVMUTE
L8R_GI2
L8L_GI2
IC9500
T9
-
GR[2]/A12
L8R_GI3
L8L_GI3
F13
-
DRVRST
IC9500
R9
-
GR[3]/A13
L8R_GI4
L8L_GI4
IC9500
N9
-
GR[4]/A14
K2
-
NRST
R9614
EXB2HV470JV
L8R_GI5
L8L_GI5
IC9500
L9
-
GR[5]/A15
L8R_GI6
L8L_GI6
IC9500
T8
-
GR[6]/A16
L8R_GI7
L8L_GI7
IC9500
R8
-
GR[7]/A17
L8R_GI8
L8L_GI8
IC9500
N8
-
GR[8]/A18
L8R_GI9
L8L_GI9
IC9500
L8
-
GR[9]/A19
L8R_BI0
L8L_BI0
IC9500
P4
-
IC9500
T7
-
BR[0]/A20
LATCH
L8R_BI1
L8L_BI1
IC9500
R7
-
BR[1]/A-1
IC9500
P3
-
SFVRST
IC9500
N4
-
SFRST
IC9500
R5
-
FPDATA1
R9615
IC9500
P5
-
FPDATA0
EXB2HV470JV
L8R_BI2
L8L_BI2
IC9500
N7
-
BR[2]/DQ0
IC9500
T5
-
FPCLK
L8R_BI3
L8L_BI3
IC9500
L7
-
BR[3]/DQ1
L8R_BI4
L8L_BI4
IC9500
K7
-
BR[4]/DQ2
L8R_BI5
L8L_BI5
IC9500
T6
-
BR[5]/DQ3
L8R_BI6
L8L_BI6
IC9500
R6
-
BR[6]/DQ4
L8R_BI7
L8L_BI7
IC9500
P6
-
BR[7]/DQ5
L8R_BI8
L8L_BI8
IC9500
N6
-
BR[8]/DQ6
L8R_BI9
L8L_BI9
IC9500
K6
-
BR[9]/DQ7
FREE RUN CLK
R9553
L8R_VDI
L8L_VDI
IC9500
E1
-
PRCKI
IC9500
T3
-
M_VDO_R
47
L8R_HDI
R9554
L8L_HDI
IC9500
R4
-
M_HDO_R
47
R9552
L8R_DCK
L8L_DCK
IC9500
T4
-
M_DCKO_R
47
L8R_MASK
L8L_MASK
IC9500
R3
-
MASK_R
P3.3V
R9525
R9523
10k
10k
AA_XWE
IC9500
R12
-
f_nWE
AA_XCE_L
IC9500
N12
-
fL_nCE
AA_XOE
IC9500
P12
-
f_nOE
AA_BYTE
IC9500
K13
-
f_nBYTE
23
24
85
D-BOARD TXN/D1XCTUS (3/8)
!
IC9500
C1ZBZ0003575
DATA_DRIVER
LVDS
SYNC PROCESSING
WB ADJ
DISCHARGE CONTROL
DD_ODEU
IC9500
R14
-
ODEU
FLASH CONTROL
DD_LEUR
IC9500
T13
-
LEUR
FPGA CONTROL
DD_LEUL
IC9500
K5
-
LEUL
DD_PCU1
FPGA,ASIC
IC9500
R13
-
PCU1
DD_PCU2
IC9500
P13
-
PCU2
DD_CLRU
IC9500
T14
-
CLRU
DD_ODED
IC9500
B14
-
ODED
DD_LEDR
LEDR
IC9500
A13
-
DD_LEDL
LEDL
IC9500
G12
-
DD_PCD1
IC9500
B13
-
PCD1
DD_PCD2
R9608
PCD2
IC9500
C13
-
EXB2HV470JV
DD_CLRD
CLRD
IC9500
M1
-
M_ROUT0
IC9500
A14
-
IC9500
M2
-
M_ROUT1
IC9500
M3
-
M_ROUT2
IC9500
M4
-
M_ROUT3
IC9500
L1
-
M_ROUT4
IC9500
L2
-
M_ROUT5
IC9500
L3
-
M_ROUT6
IC9500
L4
-
M_ROUT7
DATA ENERGY RECOVERY
R9609
TP9059
DMHR
EXB2HV470JV
IC9500
F8
-
DMHR
TP9060
IC9500
K4
-
M_ROUT8
DSHR
IC9500
G7
-
DSHR
IC9500
J4
-
M_ROUT9
TP9061
DSLR
DSLR
IC9500
F7
-
TP9062
IC9500
G4
-
M_GOUT0
DMLR
DMLR
IC9500
J6
-
IC9500
F3
-
M_GOUT1
IC9500
E2
-
M_GOUT2
DMHL
IC9500
E3
-
M_GOUT3
IC9500
H6
-
DMHL
IC9500
E4
-
M_GOUT4
DSHL
IC9500
G6
-
DSHL
R9610
DSLL
IC9500
F6
-
DSLL
EXB2HV470JV
DMLL
DMLL
IC9500
E5
-
M_GOUT5
IC9500
F5
-
IC9500
D4
-
M_GOUT6
IC9500
D5
-
M_GOUT7
IC9500
C4
-
M_GOUT8
IC9500
C5
-
M_GOUT9
IC9500
D1
-
M_BOUT0
IC9500
D2
-
M_BOUT1
SS_PULSE
FP_URH/CBK
IC9500
D7
-
URH/CBK
R9611
FP_UEH
EXB2HV470JV
IC9500
B7
-
UEH
IC9500
D3
-
M_BOUT2
FP_USL
IC9500
A7
-
USL
IC9500
C1
-
M_BOUT3
FP_USH
IC9500
C2
-
M_BOUT4
IC9500
E6
-
USH
IC9500
B3
-
M_BOUT5
FP_UML
IC9500
D6
-
UML
IC9500
B4
-
M_BOUT6
FP_UMH
IC9500
B5
-
M_BOUT7
IC9500
C6
-
UMH
IC9500
A3
-
M_BOUT8
FP_NUEL
IC9500
B6
-
NUEL
IC9500
A4
-
M_BOUT9
FP_URL
URL
IC9500
A6
-
CLK_INPUT
R9531
47
IC9500
N1
-
M_VDO_L
R9532
47
IC9500
P2
-
M_HDO_L
R9533
47
IC9500
P1
-
M_DCKO_L
IC9500
A5
-
CLKM_IN
IC9500
N2
-
MASK_L
P3.3V
R9560
10k
BUS_SW
IC9500
M12
-
BUS_SW
TH-50PF10UK
D-Board (3 of 8) Schematic Diagram
25
26
27
TH-50PF10UK
21
22
23
24
25
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