Integra DTR-7.8 Service Manual page 146

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -44
Q8001: FLI8125-LF-BC (Video Processor)
PIN CONFIGURATION
VDDA33_LBADC 1
LBADC_IN1 2
LBADC_IN2 3
LBADC_IN3 4
LBADC_IN4 5
LBADC_IN5 6
LBADC_IN6 7
LBADC_RTN 8
VSAA33_LBADC 9
RESETn 10
GND_RPLL 11
VDD_RPLL_18 12
VBUFC_RPLL 13
AGND_RPLL 14
XTAL 15
TCLK 16
AVDD_RPLL_33 17
CVDD_1.8 18
CRVSS 19
TEST 20
GPIO15 21
JTAG_BS_ENn 22
SCART16 23
HOST_SCLK 24
HOST_SDATA 25
DDC_SCLK 26
DDC_SDATA 27
CVDD_1.8 28
CRVSS 29
MSTR_SCLK 30
MSTR_SDATA 31
RVDD_3.3 32
CRVSS 33
GPIO0/TCK 34
GPIO1/TDI 35
GPIO2/TMS 36
GPIO3/TRST 37
GPIO6/IRin 38
CVDD_1.8 39
CRVSS 40
GPIO7/IRQin 41
GPIO8/IRQout 42
GPIO9/SIPC_SCLK 43
GPIO10/SIPC_SDATA/A18 44
CVDD_1.8 45
CRVSS 46
GPIO11/PWM0 47
GPIO12/PWM1 48
RVDD_3.3 49
CRVSS 50
GPIO13/PWM2 51
GPIO14/PWM3/SCART16 52
DTR-7.8
HSYNC1
156
CRVSS
155
RVDD_3.3
154
VID_CLK_1
153
VID_DATA_IN_15/GPIO23
152
VID_DATA_IN_14/GPIO22
151
VID_DATA_IN_13/GPIO21
150
VID_DATA_IN_12/GPIO20
149
VID_DATA_IN_11/GPIO19
148
VID_DATA_IN_10/GPIO18
147
VID_DATA_IN_9/GPIO17
146
VID_DATA_IN_8/GPIO16
145
CRVSS
144
CVDD_1.8
143
VID_DATA_IN_7
142
VID_DATA_IN_6
141
VID_DATA_IN_5
140
VID_DATA_IN_4
139
VID_DATA_IN_3
138
VID_DATA_IN_2
137
VID_DATA_IN_1
136
VID_DATA_IN_0
135
CRVSS
134
CVDD_1.8
133
VID_DATA_IN_23/D7/PD46
132
VID_DATA_IN_22/D6/PD45
131
VID_DATA_IN_21/D5/PD44
130
VID_DATA_IN_20/D4/PD43
129
VID_DATA_IN_19/D3/PD42
128
CRVSS
127
CVDD_1.8
126
VID_DATA_IN_18/D2/PD41
125
VID_DATA_IN_17/D1/PD40
124
VID_DATA_IN_16/D0/PD39
123
GPIO4/VIDIN_HS
122
GPIO5/VIDIN_VS
121
CRVSS
120
CVDD_1.8
119
VID_CLK2/ROM_OEN/PD47
118
CRVSS
117
RVDD_3.3
116
VID_DE/FLD/A0/PD24
115
A1/PD25
114
A2/PD26
113
A3/PD27
112
A4/PD28
111
A5/PD29
110
A6/PD30
109
A7/PD31
108
A8/PD32
107
A9/PD33
106
A10/PD34
105