Denon AVC-A1XV Service Manual page 59

PCM1792DBR (IC201-204,401,402,501,502) DAC P.W.B.
(TOP VIEW)
ZEROL
1
ZEROR 2
MSEL
3
LRCK
4
DATA
5
BCK
6
SCK
7
DGND
8
V
9
DD
MS
10
MDI
11
MC
12
MDO
13
RST
14
TERMINAL
NAME PIN
AGND1 19
AGND2 24
AGND3L 27
AGND3R 16
BCK 6
DATA 5
DGND 8
I OUT L+ 25
I OUT L– 26
I OUT R+ 17
I OUT R– 18
I REF 20
LRCK 4
MC 12
MDI 11
MDO 13
MS 10
MSEL 3
RST 14
SCK 7
V CC 1 23
V CC 2L 28
V CC 2R 15
V COM L 22
V COM R 21
V DD 9
ZEROL 1
ZEROR 2
(1) Schmitt-trigger input, 5-V tolerant
(2) Schmitt-trigger input and output. 5-V tolerant input and CMOS output
(3) Schmitt-trigger input and output. 5-V tolerant input. In I 2 C mode, this pin becomes an open-drain 3-state output; otherwise, this pin is a CMOS
output.
FUNCTIONAL BLOCK DIAGRAM
V 2L
28
CC
27 AGND3L
LRCK
26 I L−
OUT
BCK
I L+
25
OUT
DATA
24 AGND2
V 1
23
CC
V L RST
22
COM
21 V R
COM
I
20
REF
MDO
AGND1
19
MDI
I R−
18
OUT
MC
I R+
17
OUT
MS
AGND3R
16
V 2R
15
CC
MSEL
ZEROL
ZEROR
Terminal Functions
I/O I/O
− Analog ground (internal bias)
− Analog ground (internal bias)
− Analog ground (L-channel DACFF)
− Analog ground (R-channel DACFF)
Bit clock input (1)
I
Serial audio data input for normal operation (1)
I
− Digital ground
O L-channel analog current output+
O L-channel analog current output–
O R-channel analog current output+
O R-channel analog current output–
− Output current reference bias pin
Left and right clock (f S ) input for normal operation (1)
I
Mode control clock input (1)
I
Mode control data input (1)
I
Mode control readback data output (3)
I/O
Mode control chip-select input (2)
I/O
I 2 C/SPI select (1)
I
Reset (1)
I
System clock input (1)
I
− Analog power supply, 5 V
− Analog power supply (L-channel DACFF), 5 V
− Analog power supply (R-channel DACFF), 5 V
− L-channel internal bias decoupling pin
− R-channel internal bias decoupling pin
− Digital power supply, 3.3 V
Zero flag for L-channel (2)
I/O
Zero flag for R-channel (2)
I/O
Audio
Data Input
I/F
8
Oversampling
Advanced
Digital
Segment
Filter
DAC
and
Modulator
Function
Control
Function
Control
I/F
System
Zero
Clock
Detect
Manager
DESCRIPTIONS DESCRIPTIONS
59
AVR-5805/AVC-A1XV
I OUT L−
Current
Segment
DAC
I OUT L+
I/V and Filter
V COM L
Bias
I REF
and
V COM R
Vref
I OUT R−
Current
Segment
DAC
I OUT R+
I/V and Filter
Power Supply
V OUT L
V OUT R