Denon AVC-A1XV Service Manual page 44

Av surround amplifier
Hide thumbs Also See for AVC-A1XV:
Table of Contents

Advertisement

PIn
PIn Name
Symbol
34
P62/RXD0
ZIMO
35
P61/CLK0
CLKZIMO
36
P60/CTS0/RTS0
REQZOMI
37
P57
NC
38
P56
NC
39
P55/EPM
FRASH EPM
40
P54
DIRCLK8Z
41
P53
DIR CE8Z
42
P52
DIR_RST8Z
43
P51
DIRDIN8Z
44
P50/CE
FRASH CE
45
P47
DIRDOUT8
46
P46
NC
47
P45
NC
48
P44
NC
49
P43
NC
50
P42
NC
51
P41
DAPLDSTBZ
52
P40
DAPLDCLKZ
53
P37
DAPLDDATAZ
54
P36
DAMSZ
55
P35
DAMDIZ
56
P34
DAMCZ
57
P33
NC
58
P32
NC
59
P31
NC
60
VCC
VCC
61
P30
NC
62
VSS
VSS
63
P27
NC
64
P26
NC
65
P25
NC
66
P24
NC
67
P23
NC
68
P22
NC
69
P21
NC
70
P20
NC
71
P17/INT5
NC
72
P16/INT4
INT6
73
P15/INT3
INT7
74
P14/D12
MUTEZ2
75
P13/D11
NC
76
P12/D10
NC
77
P11/D9
NC
78
P10/D8
STBZOPLDI
79
P07/D7
CLKZOPLDI
80
P06/D6
ZIPLDO
81
P05/D5
ZOPLDI
82
P04/D4
MUTEZ4
83
P03/D3
MUTEZ3
84
P02/D2
VPPZ
85
P01/D1
DSPA0Z
86
P00/D0
DSPA1Z
87
P107/AN7
DSPA2Z
88
P106/AN6
NC
89
P105/AN5
DSPIOPOWERZ
90
P104/AN4
NC
91
P103/AN3
DSPROMRSTZ
92
P102/AN2
DSPRSTZ
93
P101/AN1
DSPOSCONZ
94
AVSS
AVSS
95
P100/AN0
DSPBOOT
96
VREF
VREF
97
AVCC
AVCC
98
P97/SIN4
DSPOZI
99
P96/SOUT4
DSPIZO
100
P95/CLK4
DSPCLKZ
Op
I/O
Type
Det
(Int.)
I
-
-
-
I
-
-
-
O
C
-
-
O
C
-
-
O
C
-
-
I
-
Lv
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
I
-
-
-
I
-
-
-
I
-
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
-
-
-
-
O
C
-
-
-
-
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
I
-
-
-
I
-
E ↓ &L
-
I
-
E ↓ &L
-
O
C
-
-
I
-
-
-
I
-
-
-
I
-
-
-
O
C
-
-
O
C
-
-
I
-
-
-
O
C
-
-
O
C
-
-
O
C
-
-
I
-
-
-
O
-
-
-
O
-
-
-
O
-
-
-
O
-
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
O
C
-
-
-
-
-
-
I
-
-
-
-
-
-
-
-
-
-
-
I
-
-
-
O
C
-
-
O
C
-
-
44
Op
Res
(Ext.)
Ed
Z
MAIN-ZONEμcom comm. control pIn
Ed
Z
MAIN-ZONEμcom comm. control pIn
Ed
Z
MAIN-ZONEμcom comm. control pIn
-
Z
Not used
-
Z
Not used
Eu
Z
RewrIte boot start: L
-
Z
DIR8 control pIn (LC89057W-E), control clock output ( ※ used as DIR for ZONE2)
-
Z
DIR8 control pIn (LC89057W-E), chIp enable output
Ed
Z
DIR control output (LC89057W-E) Reset: L
Eu
Z
DIR8 control pIn (LC89057W-E), control data output
ZONE2)
Ed
Z
RewrIte boot program start: H Input set
Eu
Z
DIR8 control Input pIn (LC89057W-E), control data Input
from SUBμcom)
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
FPGA control for DAC
-
Z
FPGA control for DAC
-
Z
FPGA control for DAC
-
Z
FPGA control for DAC
-
Z
FPGA control for DAC
-
Z
FPGA control for DAC
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
-
+5V
-
Z
Not used
-
-
GND
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
DIR6 control pIn (LC89057W-E) ( ※ "Z"set: Operated from SUBμcom)
-
Z
DIR7 control pIn (LC89057W-E) ( ※ "Z"set: Operated from SUBμcom)
-
Z
Mute control for DAC output ( ※ "Z"set: Operated from SUBμcom)
-
Z
Not used
-
Z
Not used
-
Z
Not used
-
Z
MAIN FPGA control pIn
-
Z
MAIN FPGA control pIn
-
Z
MAIN FPGA control pIn
-
Z
MAIN FPGA control pIn
-
Z
Mute control for DAC output ( ※ "Z"set: Operated from SUBμcom)
-
Z
Mute control for DAC output ( ※ "Z"set: Operated from SUBμcom)
-
Z
Normal: H WrItIng flash ROM for DSP: L
-
Z
PLD control for DSP (3-bIt address for target selectIon of RST/CS)
-
Z
PLD control for DSP (3-bIt address for target selectIon of RST/CS)
-
Z
PLD control for DSP (3-bIt address for target selectIon of RST/CS)
-
Z
Not used
-
Z
DSP POWER ON="L" (After 10ms from DIGITAL POWER ON)
-
Z
Not used
-
Z
Not used
-
Z
PLD control for DSP reset(Reset: L)
-
Z
ON="H"(After 20ms from DIGITAL POWER ON)
-
-
AD GND
Eu
Z
DSP rewrIte boot program (DSP rewrIte: L Input)
-
-
AD ref. +5V
-
-
AD +5V
-
Z
PLD control pIn for DSP
-
Z
PLD control pIn for DSP
-
Z
PLD control pIn for DSP
AVR-5805/AVC-A1XV
FUNCTION
( ※ used as DIR for ZONE2)
( ※ used as DIR for ZONE2)
( ※ used as DIR for
( ※ "Z"set: Operated

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents