Dsp Board-Fx Delay Ram (4 Of 5) - Kurzweil K2600 Series Service Manual

Kurzweil K2600 Series Service Manual
1
BL1RAS {3-C5,C7}
BL1CAS {3-C5,C7}
BL1W {3-C5,C7}
A
BDLY1A[09]
BDLY1A[08]
BDLY1A[07]
BDLY1A[06]
BDLY1A[05]
BDLY1A[04]
BDLY1A[03]
BDLY1A[02]
J902 BDLY1A[01]
5V/3V BDLY1A[00]
B VCC +3
BDLY1A[09:00] {3-A8}
DRAMPWR
BL2RAS {3-C5,C7}
BL2CAS {3-C5,C7}
BL2W {3-C5,C7}
C
BDLY2A[09]
BDLY2A[08]
BDLY2A[07]
BDLY2A[06]
BDLY2A[05]
BDLY2A[04]
BDLY2A[03]
BDLY2A[02]
BDLY2A[01]
BDLY2A[00]
D
BDLY2A[09:00] {3-A8}
1
7-14
DSP Board–FX Delay RAM (4 of 5)
2 3
1Mx16 DRAM 1Mx16 DRAM
14 41 BDLY1D[15] 14
RAS D15 RAS
30 40 BDLY1D[14] 30
UCAS D14 UCAS
31 39 BDLY1D[13] 31
LCAS D13 LCAS
38 BDLY1D[12]
13 D12 13
W 36 BDLY1D[11] W
29 D11 29
OE 35 BDLY1D[10] OE
D10
28 34 BDLY1D[09] BDLY1A[09] 28
A9 D09 A9
27 33 BDLY1D[08] BDLY1A[08] 27
A8 D08 A8
26 10 BDLY1D[07] BDLY1A[07] 26
A7 D07 A7
25 9 BDLY1D[06] BDLY1A[06] 25
A6 D06 A6
24 8 BDLY1D[05] BDLY1A[05] 24
A5 D05 A5
23 7 BDLY1D[04] BDLY1A[04] 23
A4 D04 A4
20 5 BDLY1D[03] BDLY1A[03] 20
A3 D03 A3
19 4 BDLY1D[02] BDLY1A[02] 19
A2 D02 A2
18 3 BDLY1D[01] BDLY1A[01] 18
A1 D01 A1
17 2 BDLY1D[00] BDLY1A[00] 17
A0 D00 A0
1 1
VCC1 VCC1
6 6
VCC2 U25 VCC2
21 21
VCC3 VCC3
DGND 22 37 42 DGND
1Mx16 DRAM 1Mx16 DRAM
14 41 BDLY2D[15] 14
RAS D15 RAS
30 40 BDLY2D[14] 30
UCAS D14 UCAS
31 39 BDLY2D[13] 31
LCAS D13 LCAS
38 BDLY2D[12]
13 D12 13
W 36 BDLY2D[11] W
29 D11 29
OE 35 BDLY2D[10] OE
D10
28 34 BDLY2D[09] BDLY2A[09] 28
A9 D09 A9
27 33 BDLY2D[08] BDLY2A[08] 27
A8 D08 A8
26 10 BDLY2D[07] BDLY2A[07] 26
A7 D07 A7
25 9 BDLY2D[06] BDLY2A[06] 25
A6 D06 A6
24 8 BDLY2D[05] BDLY2A[05] 24
A5 D05 A5
23 7 BDLY2D[04] BDLY2A[04] 23
A4 D04 A4
20 5 BDLY2D[03] BDLY2A[03] 20
A3 D03 A3
19 4 BDLY2D[02] BDLY2A[02] 19
A2 D02 A2
18 3 BDLY2D[01] BDLY2A[01] 18
A1 D01 A1
17 2 BDLY2D[00] BDLY2A[00] 17
A0 D00 A0
1 1
VCC1 VCC1
6 6
VCC2 U26 VCC2
21 21
VCC3 VCC3
DGND 22 37 42 DGND
This set of four DRAMs are for SOJ42-400 parts.
2 3
4 5
U29
1M/4Mx16 DRAM
18
RAS1M
14
RAS4M
34
UCAS1M
37
41 UCAS4M
D15 35
40 LCAS1M
D14 38
39 LCAS4M
D13
38 17
D12 W1M
36 13
D11 W4M
35 33
D10 OE1M
34 36
D09 OE4M
33
D08 BDLY1A[09] 32
10 BDLY1D[23] A9/A11
D07 BDLY1A[08] 31
9 BDLY1D[22] A8/A10
D06 BDLY1A[07] 30
8 BDLY1D[21] A7/A9
D05 R113 BDLY1A[06] 29
7 BDLY1D[20] A6/A8
D04 1K BDLY1A[05] 28
5 BDLY1D[19] A5/A7
D03 BDLY1A[04] 27
4 BDLY1D[18] A4/A6
D02 BDLY1A[03] 24
3 BDLY1D[17] A3/A5
D01 BDLY1A[02] 23
2 BDLY1D[16] A2/A4
D00 BDLY1A[01] 22
A1/A3
BDLY1A[00] 21
A0/A2
BDLY1A[09] 20
U28 NC/A1
BDLY1A[08] 19
NC/A0
22 37 42 DGND 26 39 45 50
C99 C101 C103
.1uF .1uF .1uF
U30
1M/4Mx16 DRAM
18
RAS1M
14
RAS4M
34
UCAS1M
37
41 UCAS4M
D15 35
40 LCAS1M
D14 38
39 LCAS4M
D13
38 17
D12 W1M
36 13
D11 W4M
35 33
D10 OE1M
34 36
D09 OE4M
33
D08 BDLY2A[09] 32
10 BDLY2D[23] A9/A11
D07 BDLY2A[08] 31
9 BDLY2D[22] A8/A10
D06 BDLY2A[07] 30
8 BDLY2D[21] A7/A9
D05 R114 BDLY2A[06] 29
7 BDLY2D[20] A6/A8
D04 1K BDLY2A[05] 28
5 BDLY2D[19] A5/A7
D03 BDLY2A[04] 27
4 BDLY2D[18] A4/A6
D02 BDLY2A[03] 24
3 BDLY2D[17] A3/A5
D01 BDLY2A[02] 23
2 BDLY2D[16] A2/A4
D00 BDLY2A[01] 22
A1/A3
BDLY2A[00] 21
A0/A2
BDLY2A[09] 20
U27 NC/A1
BDLY2A[08] 19
NC/A0
22 37 42 DGND 26 39 45 50
C100 C102 C104
.1uF .1uF .1uF
Only one set of DRAMs can be used. Either set can be +3.3V or +5.0V.
4 5
6 7
U31
1M/4Mx16 DRAM
18
RAS1M
14
RAS4M
34
49 BDLY1D[15] UCAS1M
D15 1K 37 D15
48 BDLY1D[14] UCAS4M
D14 R115 35 D14
47 BDLY1D[13] LCAS1M
D13 38 D13
46 BDLY1D[12] LCAS4M
D12 D12
44 BDLY1D[11] 17
D11 W1M D11
43 BDLY1D[10] 13
D10 W4M D10
42 BDLY1D[09] 33
D09 OE1M D09
41 BDLY1D[08] 36
D08 OE4M D08
10 BDLY1D[07]
D07 BDLY1A[09] 32 D07
9 BDLY1D[06] A9/A11
D06 BDLY1A[08] 31 D06
8 BDLY1D[05] A8/A10
D05 BDLY1A[07] 30 D05
7 BDLY1D[04] R116 A7/A9
D04 BDLY1A[06] 29 D04
5 BDLY1D[03] 1K A6/A8
D03 BDLY1A[05] 28 D03
4 BDLY1D[02] A5/A7
D02 BDLY1A[04] 27 D02
3 BDLY1D[01] A4/A6
D01 BDLY1A[03] 24 D01
2 BDLY1D[00] A3/A5
D00 BDLY1A[02] 23 D00
A2/A4
1 BDLY1A[01] 22
VCC1 A1/A3 VCC1
6 BDLY1A[00] 21
VCC2 A0/A2 VCC2
12 BDLY1A[09] 20
VCC3 NC/A1 VCC3
25 BDLY1A[08] 19
VCC4 NC/A0 VCC4
DGND 26 39 45 50
C105 C107 C109 C111 C113
.1uF .1uF .1uF .1uF .1uF
U32
1M/4Mx16 DRAM
18
RAS1M
14
RAS4M
34
49 BDLY2D[15] R117 UCAS1M
D15 37 D15
48 BDLY2D[14] 1K UCAS4M
D14 35 D14
47 BDLY2D[13] LCAS1M
D13 38 D13
46 BDLY2D[12] LCAS4M
D12 D12
44 BDLY2D[11] 17
D11 W1M D11
43 BDLY2D[10] 13
D10 W4M D10
42 BDLY2D[09] 33
D09 OE1M D09
41 BDLY2D[08] 36
D08 OE4M D08
10 BDLY2D[07]
D07 BDLY2A[09] 32 D07
9 BDLY2D[06] A9/A11
D06 BDLY2A[08] 31 D06
8 BDLY2D[05] A8/A10
D05 BDLY2A[07] 30 D05
7 BDLY2D[04] A7/A9
D04 BDLY2A[06] 29 D04
5 BDLY2D[03] R118 A6/A8
D03 BDLY2A[05] 28 D03
4 BDLY2D[02] 1K A5/A7
D02 BDLY2A[04] 27 D02
3 BDLY2D[01] A4/A6
D01 BDLY2A[03] 24 D01
2 BDLY2D[00] A3/A5
D00 BDLY2A[02] 23 D00
A2/A4
1 BDLY2A[01] 22
VCC1 A1/A3 VCC1
6 BDLY2A[00] 21
VCC2 A0/A2 VCC2
12 BDLY2A[09] 20
VCC3 NC/A1 VCC3
25 BDLY2A[08] 19
VCC4 NC/A0 VCC4
DGND 26 39 45 50
C106 C108 C110 C112 C114
.1uF .1uF .1uF .1uF .1uF
This set of four DRAMs are for TSOP50[44]-400 parts.
6 7
8
BDLY1D[23:00] {3-A8}
A
49
48
47
46
44
43
42
41
10 BDLY1D[23]
9 BDLY1D[22]
8 BDLY1D[21]
R119
7 BDLY1D[20]
1K
5 BDLY1D[19]
4 BDLY1D[18]
3 BDLY1D[17]
2 BDLY1D[16]
1
6
12
25
B
BDLY2D[23:00] {3-A8}
49
48
47
46
44 C
43
42
41
10 BDLY2D[23]
9 BDLY2D[22]
8 BDLY2D[21]
R120
7 BDLY2D[20]
1K
5 BDLY2D[19]
4 BDLY2D[18]
3 BDLY2D[17]
2 BDLY2D[16]
1
6
12
25
D
YOUNG CHANG CO., LTD.
Reproduction without the express written consent
of Young Chang Co., Ltd. is prohibited.
K2600 DSP Engine
FX Delay RAM
Filename: 021205C0 Date: 8/4/99
Eng: By: Mike Richmond
Mfg: Sht 04 of 05
Doc: 021205 Rev: RCV0
8