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Block Diagrams, Testpoint Overviews, and Waveforms
Block Diagram 3 Audio & Video
B 5
VIDEO DECODER
7300-J
STROBE1N
ADOC VIDDEC (PRI & SEC)
EXT. STEREO
STROBE1P
I2D1
DATA1N
PRI
Sync
Mux.
DATA 1P
STROBE3N
CHR.
STROBE3P
MUX
I2D3
DATA3N
DATA 3P
SSIF
STROBE2N
STROBE2P
SEC
FAST-
I2D2
DATA2N
BLANK
FIFO
DATA 2P
EXT. MONO
H-2FH
Ext
FROM
SRC for
SYNC
V-2FH
Syn
1116
HFB1/
c
FBL-SC1-IN
H-Sync
B18
Mux
HV_PRIM
HV_SEC
B2
B 6
FEATURE BOX
7300
ADOC FEF
BLACK
VIDDEC2
STRETCH
(YUV)
B5
BLACK
HISTOG.
VIDDEC1
STRETCH
MODIFY
(YUV)
INPUT
MEASUREMENT
SWITCH
BLOCKS
HISTOG.
MATRIX
MEAS.
BLACK
BAR DET.
BLACK
LEVEL DET
NOISE
MEAS.
ES1E AA
6.
DMSD=Digital Multi Standard Decoder
DLINK-VDDA
VDDCO
DLINK-VDDD
VID1-DTC-VDDA
DMSD
PLLVDDA
DE-
MUX
VDDE
VID1-DTC-VDD3
B8
HVSYNC
VIDDEC2
FAST
FOR-
B6
BLANK
MATER
SWITCH
VIDDEC1
HV
2Fh
INFO
7300
ADOC MBF
SUB
SUB
CH.
HOR.
VERT.
NOISE
CH.
COMPRESS
COMPRESS
SHAPER
(YUV)
MAIN
CH.
SUB
FIFO
CACHE
MAIN
MAIN
HOR.
NOISE
FIFO
DNR
CH.
COMPRESS
SHAPER
(YUV)
CACHE
MODE CONTROL
20
B 9
PROTECTION
B7
EHT-INFO
3380
KEYBOARD
7383-A
+8V
6382
7383-B
6381
+3V3
3384
6384
6397
7393
HFB_X-RAY-PROT
3398
2397
B 8
SYNC & DEFLECTION PROCESSING
7300-F
ADOC DOP
1st
1st
2nd
SLOW START/STOP
SLOW START/STOP
HVSYNC
CONTROL
CONTROL
CONTROL
VDDE
B5
LOOP
LOOP
LOOP
L0W POWER STARTUP
L0W POWER STARTUP
3340
SEL2FH
HOR. TIMEBASE GEN.
Hor. TIMEBASE GEN.
DTO & CONTROL LOOP
DTO & CONTROL LOOP
VDDE
VERT.
VERT.
3346
DRIVER
SAWTOOTH
BPA
VDDCO
DOP-DTC-VDDA
DOP-DTC-VDD3
IMEAS-VDDA
SDAC-3V3
VDDE
B4
VREF_DEFL
SDAC-VDDA
B13
MEMORY INTERFACE
7730
SDRAM
1,14,27
VDDE
VDD
3,9,43,49
VDDQ
FIELD MEMORY & TXT PG
SA0...SA11
7300-I
7300
SD0...SD15
13.5 / 27 MHz
@ 720 ppl
MEMORY
DTL I/F
CTRL/SWI.
MEMORY
UNDI-
BUS
THER
SCAN
Y
DEVICE
RATE
INTERF.
UNDI-
CONVERT
THER
Y
OUTPUT
UNDI-
MUX.
THER
UV
UV
DCTI
DISPLAY CONTROL
DCTI=Digital Color
Transient Imrpovement
+5V2
+8V
+5V
7382
+8V
6385
+3V3
VDDE
+3V3
3385
+5V
3354
7361
6353
3364
3353
3361
FLASH
HFB
X-PROT
HIRES.
HIRES.
3350
HDROUT
TIMING
TIMING
GEN.
GEN.
+8V
6368
EHT
7365
ADC
EAST-WEST
3373
BCL
WAVEFORM
2361
FBCIN
POR_FLASH
B11
VDRP
VERT.
SDAC
SDAC
VDRN
WAVEFORM
EWP
EW_MPIF
B4
27 / 54 MHz
ADOC BEF
@ 1440 ppl
LUMINANCE SHARPNESS
SHARPNES
F
S
I
MEASURE
L
LTI
T
E
Y
DYN.
R
PEAKING
PANO-
RGB
FRAME
RAMA
MATRIX
PROC.
Y
U
Y
SKIN
U
U
BLUE
GREEN
TONE
V
V
STRETCH
ENHANCE
V
CONTROL
COLOUR FEATURES
A 6
INTERFACING
40
FROM
BLOCK
45
A2
DIAGRAM
STAND-BY
SUPPLY
43
47
A8
5601
46
FROM
TUNER
SIMM
44
CONN.
LINEDRIVE1
26
A3
EHT-INFO
34
2455
6365
TO BLOCK
DIAGRAM
DEFLECTION
2
FRAMEDRIVE+
8
2
A4
FRAMEDRIVE-
9
EW-DRIVE
31
A4
TO
TILT
35
A5
B7
ROTATION
CIRCUITRY
R
TO
G
B7
B
F_15040_059.eps
290405
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