2) Block Diagram
NTEST2
NTEST
NSRVMONON
NRST
AVDD2
AVSS2
A,B,C,D,E,F
CMOS
LD
PD
RF
ARFFB
AMPLIFIER
ARFOUT
ARFDC
RFOUT
RFIN
CENV
CTRCRS
OSCIN
VREF
RFENV
A/D
CONVERTER
* SPPOL
SPOUT
TRVP
TRP
OUTPUT
FOP
PORT
SRVMON0
SRVMON1
Nanes in [ ] are Block abbreviartion.
Signals in ( ) are input signal or output signal by IO changing.
Pins marked * is the pins enable to change another signals.
TIMING
MICRO COMPUTER
GENERATOR
INTERFACE
[GEN]
[MCIF]
SPINDLE
SERVO
[SPD]
SERVO
CPU
[DSV]
MP3/WMA
DECORDER
FS
CONVERTER
[FSC]
DIGITAL FILTER
1bit DAC
PWM LOGIC
[DF.MASH]
ANALOG
LOWPASS
DIGITAL
FILTER
OUT
- 2-17 -
DSL / PLL / VCO
[DSLPLL]
EFM DEMODULATION
INTERFACE
SYNC INTERPOLATION
CIRC ECC
CDROM ECC
[DEMECC]
CIRC RAM
BUS CONTROL UNIT
[BCU]
SERIAL OUTPUT
INTERFACE
[DAO]
REGULATOR
* TXTCK
* TXTD
* DQSY
SUBCODE
(SBCK)
(SUBC)
[DEMECC]
(TXNCLDCK)
* FLAG
* BLKCK
1Mbit
PRAMVDD33
DRAM
PRAMVSS33
D0 ~ D15
A0 ~ A11
BA0,BA1
NWE,NCAS,
NRAS,SDRCK
* EXT0
* EXT1
* EXT2
(LRCK)
(BCLK)
(SRDATA)
(DVDD2)