System Control Block Diagram - Sony DVP-PQ1 Service Manual

DVP-PQ1
Q Q
3 7 6 3 1 5 1 5 0

3-4. SYSTEM CONTROL BLOCK DIAGRAM

MB-103 BOARD (3/4)
(SEE PAGE 4-17 to 4-19)
HA 0 – 21 HA 0 – 21
HD 0 – 15 HD 0 – 15
XRD
XWRH
SIGNAL PROCESSOR
(SEE PAGE 3-5)
XARPIT
XARPCS
XWAIT
XRST
XRST
XSDPIT
XSDPCS
RF/SERVO
XDRVMUTE
(SEE PAGE 3-4)
XLDON
T E
L 1 3 9 4 2 2 9 6 5 1 3
XAVDIT
DREQ0
DACK0
DREQ1
DACK1
XAVDCS2
XAVDCS3
XFRRST
SIGNAL PROCESSOR
(SEE PAGE 3-5)
33MARP
w w w
27MAVD
512FSAVD
05
IC106 IC107
or
16M FLASH OTP
1 – 5 102 – 109 111 – 118 120 85 – 100
HA 0 – 21 HD 0 – 15
70 XRD
71 XWRH
17 INT1
62 CS4X
67 XWAIT
35 XRST
18 INT2
63 CS5X
IC104
48 XDRVMUTE
82 WIDE
SYSTEM
CONTROL
IC101
EEPROM
WP 7 7 WP
SCL 6 39 SCL
SDA 5 38 SDA
16 INTO
46 DREQ0
47 DACK0
49 DREQ1
50 DACK1
60 CS2X
61 CS3X
81
IC103 qg
14 FSEL
3.2 Vp-p (33.87 MHz)
15 33-1OUT
3 27-1OUT
x a o
y
. i
3-7
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IC104 tf
58 59 72 84
1.7 Vp-p (16.5 MHz)
X1
53
X101
16.5MHz
X0 54
XARPRST 36
Q Q
3 7 6
SI0 25
SO0 26
SCO 27
XIFCS 51
INT4 20
XFRRST
76
MA MUTE 83
SO1 29
SC1 30
XDACS 79
IC103 7
IC103
PLL
1.5 Vp-p (27 MHz)
XTI
7
X102
27MHz
XTO 8 DVD: 3.3 Vp-p (24.57 MHz)
CD: 3.3 Vp-p (22.58 MHz)
512-2OUT 9
512-1OUT 10
u 1 6 3
IC103 3
.
3.5 Vp-p (27 MHz)
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2 4
8 9 9
VIDEO/AUDIO
WIDE
(SEE PAGE 3-10)
3 1 5 1 5 0 8 9 2
MA MUTE
SO1
SC1
XDACS
AUDIO/VIDEO
XRST
(SEE PAGE 3-9)
IC103 9, 0
512FS2CH
m
c o
3-8
2
8 9 9
CN101 4 9 8 2 9 9
SI0
4
SO0
1
INTERFACE
3 SC0
CONTROL
6 XIFCS
(SEE PAGE 3-11)
5 XIFBUSY
8 XFRRST