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Sony DVP-M35 Operation Manual

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OPERATION MANUAL

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  Summary of Contents for Sony DVP-M35

  • Page 1 OPERATION MANUAL...
  • Page 2: Table Of Contents

    Contents 1. Outline ........................1- 1.
  • Page 3 3. SERVO BLOCK ......................3-l-2.
  • Page 4 4-5. Large Gate Array CXD8728 (IC804 on MB-78 board)....... .72 4-5-l. Block Diagram ...................... 4-5-2. Pin Functions ......................4-6. Middle Gate Array CXD8746 (IClOl on MB-78 board) ......78 4-6-l. Block Diagram ...................... 4-6-2. Pin Functions ......................4-7. Small Gate Array CXD8747 (IC807 on MB-78 board) .......81 4-7-2.
  • Page 5: Outline

    DVP-M30 NTSC Japan specifications (1OOV) DVP-M35 PAL/NTSC China specifications (230V) DVP-M35 PAL/NTSC Hong Kong specifications (230V) DVP-M35 PAL/NTSC General overseas specifications (110 to 240V) DVP-M35 PAL/NTSC Singapore specifications (230V) *Output terminal: S terminal, video, audio x2 DVP-S300 NTSC U/C specifications (120V)
  • Page 6: L-2. External Appearance Diagram

    *Output terminal AC3 21P Euro (DVP-S315, S715) S terminal, video, audio xl Note: Video-CDs recorded in the PAL format can be played only by general overseas specifications models. 1-2. External appearance diagram Basic Dolby digital models 280 size models...
  • Page 7: L-3. Internal Appearance Diagram (Top View)

    DVP-S7 15 1-3. Internal appearance diagram (top view) Basic Dolby digital models YS board VIDEO) HP board ME board b o a r d . FRONT SIDE FR board FL board SWITCH) DRIVER/FUNCTION SWITCH)
  • Page 8 P O W E R B L O C K . AU-board , HP board (HEAD PHONE) board, Disc Drive Unit LE board Power transformer AU board PS board (DVP4715) , (AUDIO) (AUDIO FOWER) Power block (SWITCHING (SIGNAL PROCESS HP board (HEAD PHONE;...
  • Page 9: L-4. Disc Drive Unit

    l-4. Disc drive unit 1) Configuration of disc drive unit. [Optical block specifications] CD system OPT Thread motor Configuration of thread system Tilt sensor Optical block ass’y Specification DVD system OPT DC system OPT Non-deflection, Non-deflection, limited optical system Optical system unlimited optical system (laser coupler) Drive unit...
  • Page 10 2) Optical route diagram Object lens 6 Laser coupler For CD Laser diode...
  • Page 12: Signal Processing Block

    Signal Processing Block Block which performs various signal processings from the RF front end to the output of the audio signal and video signal. 2-1. DVD RF Front End Figure 2-1. TK-47 Board ICOO6 SSl33P3720 RF/DVD about 1.4V about 1.4V r a n g e 5 0 0 m V 1 OOns...
  • Page 13: 2-L- 1. Attenuation Of Op Output Signals

    2-l-l. Attenuation of OP Output Signals The RF signals (RFP, RFM) output from OP for DVD are attenuated by R066 and R064 so that they satisfy the input amplitude allowable level of ICOO m the post stage. (About lV,,, (“3) for SL (“1) disc. In actual, only the RFP signal is output be- cause RFM signal is connected to the ground in the OP block.
  • Page 14 The input signal to ICOO DIP@ and DIN@ is a signal processed after EQ block mentioned later. * 1: Single Layer disc (3) EQ block The EQ block is a programmable equalizer filter differentiator block. The DVD format is premised on the EQ and requires high frequency signals to be boosted.
  • Page 15 (4) Serial interface Various values of ICOO are set to internal serial port register via serial interface. Actually, they are set by three signals from the L G/A IC804. Signals are SDEN@, S D E N SDATA DATA, 8-BIT ADDRESS, S C L K T S E N H T S E N D L...
  • Page 16: Cd Rf Front End

    2-2. CD RF Front End TK-47 board BLOCK Figure 2-6. TK-47 board RF/CD The RF signal output from the CD OP is input to ICOO @ and @, and transmitted to IC806ARP of the MB-78 board via the amplifier, equalizer. about 1-1.4Vp-p about 1-1.4Vp-p r a n g e...
  • Page 17: Rf Signal Processing Block

    2-3. RF Signal Processing Block The block is composed of the IC806 ARP (CXD1865R) and IC810 4Mbit DRAM (pPD424260) of the MB-78 board. In the case of the DVD, the ARP is input with the AGC and RF equalize-processed DVD-RF signal at the ICOO analog front end (SSI33P3720) of the TK-47 board.
  • Page 18: Decrypt Block

    2-4. Decrypt Block Data sent from ARP is subject to decoding of the digital copy protection for preventing illegal copy determined by DVD standards at IC811 (CXD1904), and then sent to the AV decoder in the post stage. Composed of two 16M SDRAMs (IC201,202MB81117622) and AVDEC (IC203, L64020), it is used to decode DVDNCD data (MPEG stream) from the decrypt.
  • Page 19 YCO-7 DCRSDO-7 From D E C R Y P T AU-197 0353 E R R O R D C K Digital MB90096 To IClOl MGA (2ch signal) From ICE06 C D L R C K CD BCK C D D A T A Figure 2-10.
  • Page 20: Dnr, Video Encoder Blocks

    2-7. DNR, Video Encoder Blocks The video data from the AV decoder is sent to IC251, DNR (CXD1854), subjected to video noise reduction, and sent to the IC252 video encoder CXD1914 in the post stage. The video data is converted to NTSC/PAL video signal (color difference signal/S-Y, S-C/composite) here. CXD1914 From For S terminal...
  • Page 21: Clock Generation Block

    2-8. Clock Generator Block The IC209 CXD8696PLL IC generates 27 MHz, and using this as the master clock, generates the system clock for audio decoding. 768fs System Clock 384fs 16.9344 MHz 33.8688 MHz 18.4320 MHz 36.8640 MHz x210 Figure 2-12. Clock generator...
  • Page 22: Decoder Block

    2-9. AC-3 Decoder Block M G/A (ICiOi) cxo 874611 SSTC A C S C To DF DATA AU-197 board Decoder SRAM Figure 2-13. AC-3 Decoder The SPDIF-AC3 (Dolby Digital Bit-Stream) audio data output from AVDEC is input to the AC-3 decoder (IC104) via DIR (IC102) and M G/A (IClOl). In the AC-3 decoder (IC104), the data is processed for three lines, and sent to the AU-197 board DF/GAC via the M G/A (IClOl).
  • Page 23: Audio L, R 2Ch Signal Block

    2-10. Audio L and R 2ch Signal Block The audio signal data for 2 channels of the MB-78 board AV decoder IC203 (L64020) is passed through IClOlMGA, passed through the digital filter in the AU197 board IC215 (CXD8750), converted to analog signal in the DAC, and passed through the LDF to become the line out signal.
  • Page 24: Audio 5.Lch Signal Block

    2-11. Audio 5.lch Signal Block The AC3 decoded signal DD-DATA C/R/F output from the MB-78 board IClOl MGA (CXD8746) is input together with DD BCK and DD LRCK to IC203, IC204, and IC205 (CXD8750) of the AU-197 board, passed through the digital filter, and converted to the analog signal in DAC.
  • Page 25: Dvp-S715 Au-205 Board Block Diagram

    2-12. DVP-S715 AU-205 Board Block Diagram Figure 2-17...
  • Page 26: System Control Block

    2-13. System Control Block The system controller is composed mainly of the IC805 (HD6437034) SH microcomputer, and and IC807 (CXD8747) small gate array, etc. It serves to control the overall servo system. 2-14. Interface Control Block The interface controller is composed of the IC604 (MB90T678) I/F microcomputer, IC608 commands to the SH microcomputer based on the switch information from the FL board and FR board, receives the current information from the SH microcomputer, and displays on the FL tube display.
  • Page 28: Servo Block

    3. SERVO BLOCK 3-l. General Description of Servo Circuits Pickup Control 3-l-l. Optical Dedicated optical pickups for DVD and for CD and video CD are provided. The focus and tracking servo gains are automatically adjusted for every disc loading so that the gains are constant for every disc to be played.
  • Page 29: Servo Operation At Dvd Play

    3-2. Servo Operation at DVD Play 3-2-l. Optical Pickup Control focus servo The focus error signal output from the optical pickup for DVD (hereinafter referred to as optical pickup) is entered to the TK-47 board ICOO6: SSI33P372OA A to D (@ to The balance amount and offset amount of the focus error signal is set by IC805 (CPU) via IC804 of the MB-78 board using the internal register of ICO06.
  • Page 30 MB-78 board TK-47 board SERVODSP From IC804 Figure 3-l. DVD focus servo, drive...
  • Page 31 The IC506 Servo DSP: CXD8730 on MB-78 board provides the following control in the focus servo system. (a) Focus search The optical pickup lens is moved toward a disc to turn on the focus servo. The focus servo loop is turned on when the PI (Pull IN) signal (used for FOK: Focus OK) exceeds the specification (Vc +0.25V) and the FlE signal zero-crossing is detected.
  • Page 32 Figure 3-3. Example of S-shape Figure 3-2. Example of S-shape waveform for the DVD disc waveform for the DVD disc (dual layer) MB-78 board (single layer) MB-78 board CN303 @P CN303 @P F O K F O U T Figure 3-4. Focus jump waveform Figure 3-5.
  • Page 33 The FE signal input to IC506 (DSP CXD8730R) is low frequency boosted and gain-adjusted at the internal digital filter, and then output from the DSP as the focus drive signal (F OUT @P) by the D/A converter inside the DSP. The FOUT signal is input to the focus actuator (coil) drive IC (IC363:BA5981).
  • Page 34 The Servo DSP IC provides the following control in the tracking servo system. (a) Tracking gain adjustment The gain of internal digital filter of IC is automatically adjusted so that the tracking servo loop gain becomes optimum. Consequently, the optimum gain for each disc to be played can be attained, besides correction of gain variations in tracking actuator (coil) and optical pickup sensor (photodiode for tracking and focusing).
  • Page 35 Figure 3-7. Trv (TE at tracking servo Figure 3-8. TE (enlarged Trv) OFF) waveform at DVD waveform at DVD disc, disc, IC506@P Figure 3-9. ITJ (track jump) waveform at DVD disc, IC506@P...
  • Page 36: Sled Control

    3-2-2. Sled control H P F T o sled motor From FG-43 board. - - - V W - - - - ’ Feedbackspeed - - - - Figure 3-10. DVD Sled control 1) Sled control during playing During disc playing, namely, when the focus servo and tracking servo are turned on, the sled servo controls the sled motor so that an objective lens of optical pickup positions always in the center of movable range of tracking actuator.
  • Page 37 The sled error signal is passed through the digital filter in IC506 (DSP), and output from the DSP as the SOUT (@P) signal from the D/A converter. The SOUT signal is input to DVI (@P) of the sled drive IC (IC302:LA6527N). The sled drive IC incorporates a speed (motor rotation speed) feed back control using the Hall element.
  • Page 38: Spindle Control

    3-2-3. Spindle Control This section describes the flow of control signals in the spindle servo during DVD playback. The CLV control signal is generated from the RF signal obtained from the optical pickup in P) and CLV phase error (MDPO @P). These two error signals is added by IC301 (NJM3404) and output from OP.
  • Page 39: Tilt Control

    3-2-4. Tilt Control TK-47 board MB-78 board Figure. 3-I 2. Tilt control (1) Tilt servo by tilt sensor Tilt control using the tilt sensor of the optical pickup is performed at the start of DVD playback and CD playback. The tilt sensor output signal of the optical pickup (TK-47 board CNOOl, @P SKEW IN (TIA), @P SKEW OUT (TIB)) is input to tilt amplifier (a, @P) of ICOO (SS 13P3720).
  • Page 40 (2) Tilt offset adjustment minimizing jitter To optimize RF during DVD playback (excluding search), the jitter (JITTER:time-axis fluctuation of the RF signal) is measured, offset is added to the tilt servo loop, and the jitter is minimized. As jitter is adjusted at shipment, normally this adjustment is not required during playback. However if the jitter deviates with time, the adjustment value may not be optimum according to the disc.
  • Page 41: Servo Operation At Cd And Video Cd Playing

    3-3. Servo Operation at CD and Video CD Playing 3-3-l. Optical Pickup Control (1) CD focus servo Figure 3-13. S waveform at CD disc (focus error), IC506@P The RF signal (PDI, PD2) output from the CD optical pickup is converted to the focus error signal (CDFE, BP) in ICOO (CD RF amplifier CXA2555Q) of the TK-47 board.
  • Page 42 CD FE- Figure. 3-14. CD focus servo, drive...
  • Page 43 (2) CD tracking servo TK-47 board CXD8730 T o C D p i c k u p From tracking coil optical b l o c k Figure 3-15. CD tracking servo Figure 3-16. Trv (TE at tracking servo OFF) Figure 3-17. TE (enlarged Trv) waveform waveform at CD disc, at CD disc, IC506@P...
  • Page 44 The CDE and CDF signals output from the CD optical pickup are converted to the CD tracking error signal (CDTE @P) at ICOO of (CXA2555Q) the TK-47 board. The CDTE signal is input to the switch IC (IC452, MC14053) of the MB-78 board. During CD playback, it is passed through the switch IC (IC452), amplified at IC503, and input to @P TE of IC506 (DSP CXD8730R).
  • Page 45: Sled Control

    3-3-2. CD Sled Control CD sled control is exactly the same as the DVD. However settings in IC506 (DSP:CXD8730R) differ. 3-3-3. CD Spindle Control As the RF signal is processed inside IC806 (CXD1865), the process from the ARP is the same as the DVD.
  • Page 46: 3-4-L. Motor Driver

    Disc loading, unloading, and chucking operations are performed with one DC motor. Its block diagram is dhown in Figure 3-19. 3-4-l. Motor Driver The system controller IC (ICSOS) controls the open and close of the tray. It monitors the sensors of the mechanism and controls the operations of the tray motor via the L G/A IC (1004).
  • Page 47: Differentiation Of Disk Type

    3-5. Differentiation of Disc Type This series can determine three types of discs (CD/DVD-SL/DVD-DL) at one time when performing focus-search. 3-5-l. CD/DVD Differentiation The pit shape and track pitch are quite different between CD and DVD. Because of this difference, TE is not generated even if a large laser spot for CD is shot at a high density disk such as DVD.
  • Page 48: Block Diagram (Servo)

    3-6. Block diagram (Servo)
  • Page 49: Ic Pin Description

    4. IC PIN DESCRIPTION 4-l. ARP 4-l-l. Block Diagram 150:XMWR 113WFCK 114SCOR 117:SBS0 51NORF 119:soso 52JlTPWM 55FWON 120SOCK Frame/sector Buffer 94SDEF p r o t e c t i o n c o n t r o l 19 AOUTI 106DATA 108LRCK 43MDS0...
  • Page 50: 4-L-2. Pin Functions

    4-l-2. Pin Functions VCOIN VCC control input VCO external resistor 1 VCO external resistor 2 TEST0 VCO test output VCCA4 Analog positive power supply VCO oscillation output/test input...
  • Page 51 Direction Level Function Pin No. Signal Name Digital ground v s s CLV speed error MDSO Digital positive power supply Digital ground v s s MDS 1 CLV speed error 5 I Motor on M D P O CLV phase error CLV phase error DFCT Defect detection output...
  • Page 52 Direction Level Function Pin No. Signal Name XWAT Wait XRST Reset Digital positive power supply TEST0 Test pin SCMD Test pin ETST Test pin v s s Digital ground SDCK S D bus clock XSHD S D bus header SD bus REQ XSRQ XSAK SD bus ACK...
  • Page 53 Pin No. Signal Name Direction Level Function v s s 1 2 5 1 2 6 M N T O Monitor bus 1 2 7 Monitor bus 1 2 8 MNT2 Monitor bus 1 2 9 MNT3 Monitor bus 1 3 0 Digital positive power supply MNT4 Monitor bus...
  • Page 54 Pin No. 1 Signal Name 1 Direction 1 Level 1 Function MD09 1 6 8 MD10 DRAM data 1 6 9 MD11 DRAM data 1 7 0 v s s Digital ground MD12 DRAM data MD13 I 3.3 I data DRAM MD14 DRAM data...
  • Page 55 Audio Decoder Block Host I/F Block M P E G - 2 b Display Program Stream Data Strobe - Pre-Parser SDRAM Interface Data Request +...
  • Page 56: Pin Assignment

    4-2-2. Pin Assignment CD-LRCLK CD-ALCK ERROR-N READ/READ-N A - 7 v s s ZTEST A - 5 SCAN-TE A - 4 A - 3 1 1 9...
  • Page 57 V D D 1 4 4 1 4 6 v s s 1 4 7 SCSI-N 1 5 0 S R A S - N V D D 1 5 2 SRAS-N 1 5 4 S D Q M v s s PLLVDD 1 5 6...
  • Page 58 DVCC DGND CLKDUT PGREF FGREF DGND DGND DGND TRST DVCC DGND T M S EMU1...
  • Page 59: Pin Functions

    4-3-2. Pin Functions This section describes signals. The input/output states of signals are differentiated by the input (I), outpu (0), and high impedance (Z). Each signal is grouped by function. Function Pin Signal Name I/O Analog signal pin AD upper limit reference voltage output. When using VRTS Analog the VRTS output to the VRTA input.
  • Page 60 Function Pin Signal Name I/O Frame sync signal/host data write strobe signal input for data transmission. In the serial mode, the data transmission frame sync signal is input. In the parallel mode, the data write strobe signal is input. o / z CMOS Host serial data/host interrupt signal output.
  • Page 61 Pin Signal Name I/O Function FGREF FG counter reference pulse signal input. The polarity (Hysteresis) of the input can also be checked by the host output register (bit 10). FGIN FG pulse signal input. The polarity of the input can also be checked by the host output register (bit 9).
  • Page 62 Pin 1 Signal Name 1 I/O 1 Function 52 52 AGND AGND Ground for analog circuit. 53 53...
  • Page 63 4-4. AC3 Decoder MB86342 (MB-78 Board IC104) 4-4-l. Block Diagram B-bus XRST CLKGM PSTOP MCORE SYNC EXLOCK - H D O U T M E M -W E...
  • Page 64: Pin Functions

    4-4-2. Pin Functions Write enable output pin for external SRAM interface 67-66, AOO-A15 Serial data output pin for external SRAM interface 64-55, 52-49 32, 91, 89-85 DOO-D 19 Data input/output pin for external SRAM interface 82-80, 77-68 ICCLK Clock output pin for emulator ICBRK External brake control signal input pin for emulator ICDO, ICDl...
  • Page 65 Parallel device Address i c s i Address (DECRIPT) Decode Wr I Rd i-b WAIT IN WAIT k WAIT Gen Expansion Output (Pins 44 to 58) Data ! M Expansion Input (Pin 18) Input Serial Communication Device DATA Clk i, Gr3 RxD (SO) Serial Communication...
  • Page 66 4-5-2. Pin Functions Can be set to control, non-control, acceleration. signal:ON when “II” I/O, RD/WR Spindle servo gain control signal. Switches the gain of the “first stage” amplifier. Changer roulette rotation. Rotates when “I-I”. TBLR I/O, RD/WR TBLL I/O, RD/WR Changer roulette rotation.
  • Page 67 Function TSENS I/O, RD Changer roulette position detection sensor. No groove when “L”. Groove is present when “H”. DSENS I/O, RD Changer disc presence detection sensor. Present when “II” and absent when “L”. I/O, RD DISC detection position (rotary sensor) 0 to 7 value I/O, RD I/O, RD DISC detection position (rotary sensor) 0 to 7 value...
  • Page 68 Function Pin No. Signal Name SIG1 SHIF, OUT SIG2 XIRQ7 SHIF, OUT SHIF, IN HA21 HA20 SHIF, IN Peripheral I/F, OUT Servo DSP chip select & write CPCK SHIF, IN CPU clock BUSCNT. OUT BUS buffer control. Gate off when “II”. HA19 SHIF, IN SHIF, IN...
  • Page 69 Function (DIAGN) H/W, OUT SH serial channel 1 SCLK (GROUP2) or IRQ5 SCKG2, (IRQS) CXD1914 serial clock AV CK Resync 27Mclock AUDIO output gain switching signal 4 (AC-3) I/O, RD/WR channel L, R (or spare port) I/O, RD/WR 2 Channel DAC Latch PDCLK Host status notification.
  • Page 70 Pin No. 1 Signal Name 1 RD/VVR,SHIF Function CLAPBSY I/O, RD When the clap IC MSM6654 is generating sounds, outputs the “II” level. When the power is turned O N . OTASUKE I/O, RD Active “L” level when the help IC NJM2072M is needed.
  • Page 71 D V D K D S E L DATA Shift (16 / 24) (CD / DVD) Level Conversion 7 6 8 f s D E T O N L R C K TimingMatch F r o m DIR to AC-3 Level Conversion A C - 3 A signals = LRCK, BCK, DATA...
  • Page 72 4-6-2. Pin Functions...
  • Page 73 Pin No. 1 Signal Name 1 I/O 1 Level 1 From/For 1 Function AC-3 Audio signal (Karaoke) to AC-3 BCKS AC-3 Audio signal (Karaoke) to AC-3 AC-3 Audio signal (Karaoke) to AC-3 FS384 384fs LRCK3 Karaoke Audio signal to karaoke BCK3 Karaoke Audio signal to karaoke...
  • Page 74 4-7. Small Gate Array CXD8747 (MB-78 Board IC807) 4-7-l. Block Diagram XRST HAO-8...
  • Page 75 4-7-2. Pin Assignment...
  • Page 79 Sony Corporation 9-921-669-21 Home A&V Products Company Printed in Japan @ 1998.3 Published by General Engineering Dept. (Osaki East)

This manual is also suitable for:

Dvp-s300Dvp-s305Dvp-s315Dvp-s5oodDvp-s505dDvp-s715