Aiwa 6ZG-1 Service Manual page 23

Pin No. Pin Name
43 BCK
44 BCKI
47 XUGF
48 XPCK
49 GFS
50 C2PO
51 XTSL
52 C4M
53 DOUT
54 EMPH
55 EMPHI
56 WFCK
57 SCOR
58 SESO
59 EXCK
62 SYSM
63 AVSS
64 AVDD
65 AOUT1
66 AINI
67 LOUT1
68 AVSS
69 XVDD
70 XTAI
71 XTAO
72 XVSS
73 AVSS
74 LOUT2
75 AIN2
76 AOUT2
77 AVDD
78 AVSS
79 XRST
Note)
• PCMD is the two's complement output with MSB first.
• GTOP monitors the protection status of the Frame Sync. (H: Sync protection window opened).
• XUGF is the Frame Sync negative pulse which is obtained from the EFM signal. This is the signal before the sync protection.
• XPLCK is the inverted signal of the EFM PLL clock. The PLL works so that the fall-down edge and the changed point of the
EFM signal agree.
• GFS is the signal that goes "H" when the Frame Sync and the internally inserted timing agree.
• RFCK is the signal having 136 micro-seconds (during normal speed) that is generated to have the same accuracy as X'tal.
• C2PO is the signal indicating the error status of the data.
• XRAOF is the signal that is generated when the 16k RAM goes outside the jitter margin ±4F.
I/O
O D/A interface bit clock output.
I D/A interface bit clock input.
O XUGF output, MNT1 or RPCK output by switching command.
O XPLCK output, MNT0 output by switching command.
O GFS output, MNT3 or XRAOF output by switching command.
O C2PO output, GTOP output by switching command.
I X'tal select input terminal, X'tal: 16.9344MHz = "L" 33.8688MHz = "H".
O 4.2336MHz output, Output 1/4 divided frequency of VCKI at CAV-W mode.
O Digital Out connector output signal.
O "H" when the playback disc has emphasis. "L" when it does not.
I De-emphasis ON/OFF, "H" when ON, "L" when OFF.
O WFCK output.
O H output when the subcode sync S0 or S1 is detected.
O Serial output for SubP-W.
I SBSO read out clock input.
I Mute input terminal, Active the "H" setting.
— Analogue GND.
— Analogue power supply. (+5V)
O Lch/analogue output terminal.
I Lch/OP AMP input terminal.
O Lch/LINE output terminal.
— Analogue GND.
— Power supply for master clock.
Input terminal for crystal oscillator circuit.
I
Input external master clock from this terminal.
O Output terminal for crystal oscillator circuit.
— GND terminal for master clock.
— Analogue GND.
O Rch/LINE output terminal.
I Rch/OP AMP input terminal.
O Rch/analogue output terminal.
— Analogue power supply. (+5V)
— Analogue GND.
I Reset system at "L" setting.
33
Description