Block Diagram - I. Link Section; Q Q - Sony STR-DA9000ES Service Manual

STR-DA9000ES

Q Q

3 7 6 3 1 5 1 5 0
6-4. BLOCK DIAGRAM – I. LINK Section –
J3002
i. LINK S200
AUDIO IN
4
TAIP
3
TAIN
2
TBIP
1
TBIN
BIAS
T E
L 11 1 3 9 4 2 2 9 6 5 1 3
958OUT
(Page 25)
I512
9
LEVEL SHIFT
22.5792
(Page 24) IC3013
DATA
BCK
21
LRCK
MILES AUDIO
(Page 27)
MILES RESET
19
I512 OFF
(Page 25)
w w w
15
DI1O
16
DI2O
14 TRA1P
DI5O 19
143 TRA1N
DI6O 20
142 TRB1P
DI3O 17
141 TRB1N
18
DI4O
145 VALIB OUT 3
ERR_OUT 174
SYTOUT 24
129
XO
X3001
24.576MHz
XI
130
I. LINK INTERFACE
IC3003
164 DOUT
27 FSS12 OUT
167 FSS12
XRAS
78 18 XRAS
XCAS
79 34 UCAS
35 LCAS
XWE 81 17 XWE
XOE 33 XOE
80
171 SACKO
172 LRCKO
XRD 52
XWR 51
XCS
50
XRDY 53
PWD 119
XRESETO
122
XRESETL 165
REFOUT
23
PLLCKI 25
x a o
y
. i
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DSD-L
DSD-R
DSD-SL
22
DSD-SR
(Page 28)
DSD-C
DSD-W
64FS
D0 – D15 D0 – D15
A1 – A8
A1 – A13
SD-RAM
IC3008
EEPROM
IC3001 Q Q
3 7 6
D0 – D7
A1 – A13
CE 20
OE 22
WE 27
VCO
IC3005
4 FINA
5 FINB
3 VCOO VCOX 10
u 1 6 3
.
26 26
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2 4
8 9 9
DIVIDER
IC3009
IC3007 (2/2)
12
QC
10
ENT
LOAD 9
1 CLR
2 CK ENP 7
DIVIDER
IC3006
C0 15
9
SWITCHING LOAD
1 CLR
IC3007 (1/2) ERROR-3210
2 CK ENP 7
35 ERR CLR UN-MUTE 10
HCNTL0 51 39 HCNTL0
HCNTL1 52 46 HCNTL1
AKE_XF 19 27 XF
HRDY 21 55 HRDY
XHAS 22 13 HAS
XHDS1 23 127 HDS1
3 1 5 1 5 0 8 9 2
XHDS2 24 129 HDS2
XHCS 25 17 HCS
I. LINK SYSTEM
XRS 26 98 RS
CONTROLLER
IC3002 HRW 54 18 HR/W
HBIL 53 62 HBIL
48 EEP_CS
44 RD
IIC DATA 30
46 WR
IIC CLK 29
18 MIES AUDIO
RESET SWITCH
RESET 12
IC3011
49 CXD3270_XCS
39 RDY
XOUT 13
89
PHY_BIAS
X3002
90 PHY_RST
10MHz
92 LINK_RST XIN 15
m
c o
2
8 9 9
• SIGNAL PATH
: AUDIO (DIGITAL)
ERROR-3210 15
(Page 25)
I. LINK DSP
IC3012
4 9 8 2 9 9
X1 96
X3003
20MHz
X2/CLKIN 97
I2C-DATA
23
I2C-CLK
(Page 33)