Sony STR-DA9000ES Service Manual page 141

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• I. LINK BOARD IC3002 M30626FHPFP-DA9000ES (I. LINK SYSTEM CONTROLLER)
Pin No. Pin Name
1 to 7 HD6 to HD0
8 BYTE
9 CNVSS
10 UN-MUTE
11 NC
12 RESET
13 XOUT
14 VSS
15 XIN
16 VCC
17
NMI
18 MILES AUDIO
19 AKE_XF
20 XHINT
21 HRDY
22 XHAS
23, 24 XHDS1, XHDS2
25 XHCS
26 XRS
TE
27, 28 NC
L 13942296513
29 IIC CLK
30 IIC DATA
31 TXD1
32 RXD1
33 CLK1
34 RTS1
35 ERRCLR
36 STR/TA
37, 38 NC
39 RDY
40 ALE
41
HOLD (PULL UP)
42 HLDA
43 BCLK
44 RD
45 WRH
46 WR
47 NC
48 EEP_CS
49 CXD3210 CS
www
50 NC
51, 52
HCNTL0, HCNTL1
53 HBIL
.
54 HRW
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I/O
I/O Two-way data bus with the i. link DSP
External data bus line byte selection signal input terminal
I
"L": 16 bit, "H": 8 bit Fixed at "L" in this set
— Processor mode selection signal input terminal "L": single Fixed at "L" in this set
O Muting on/off control signal output terminal
O
Not used
I System reset signal input from the main system controller "L": reset
O
System clock output terminal (10 MHz)
—
Ground terminal
I
System clock input terminal (10 MHz)
— Power supply terminal (+3.3V)
I Non-maskable interrupt input terminal Not used
O
PCM audio data output to the DSP1
I
External flag signal input from the i. link DSP
O Interrupt signal output terminal Not used
I
Ready signal input from the i. link DSP
O
Address strobe signal output to the i. link DSP
O
Data strobe signal output to the i. link DSP
O
Chip select signal output to the i. link DSP
O
Reset signal output to the i. link DSP "L": reset
O
Not used
I
Serial data transfer clock signal input from the main system controller
I/O
Two-way data bus with the main system controller
I Not used
I
Not used
I
Not used
I
Not used
O Error output clear signal output terminal
I
Model setting terminal "L": STR-DA9000ES, "H": TA-DA9000ES
O
Not used
I
Ready signal input from the i. link interface
O Not used
I
Not used
O
Not used
O
Not used
O Read data output to the EEPROM and i. link interface
O
Not used
O
Write data output to the EEPROM and i. link interface
O
Not used
O Chip select signal output to the EEPROM
O
Chip select signal output to the i. link interface
O
Not used
x O ao u163
Control signal output to the i. link DSP
y
O Byte identification signal output to the i. link DSP
i
O
Read/write signal output to the i. link DSP
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8
Description
Q Q
3 6 7 1 3 1 5
co
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STR-DA9000ES
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9
141