Sony STR-DA9000ES Service Manual page 122

STR-DA9000ES
QQ
3 7 63 1515 0
– AMP Board –
IC1504, 1505, 1516, 1517 CXD9730Q
80
1
OUTR2+
2
VDDR2+
3
VDDR2–
4
OUTR2–
5
VSSR2–
6
VSSR1–
7
OUTR1–
8
VDDR1–
9
VDDR1+
10
OUTR1+
VSSR1+ 11
VWELR 12
PWM
VWELL 13
/THROUGH
VSSL2+
14
OUTL2+ 15
VDDL2+ 16
VDDL2– 17
OUTL2– 18
TE
L 13942296513
VSSL2– 19
VSSL1– 20
OUTL1– 21
VDDL1– 22
VDDL1+ 23
OUTL1+ 24
25 26 27 28 29 30 31
– I. LINK Board –
IC3005 TLC2932IPWR
LOGIC VCO
VDD SELECT OUT FIN-A
1 2 3 4
1/2 DIVIDER
VCO
www
.
14 13 12 11
VCO R BIAS VCO VCO
VDD IN GND INHIBIT
122
http://www.xiaoyu163.com
79 78 77 76 75 74 73 72 71 70 69
CLOCK
GENERATOR
(SECONDARY)
LINER
∆∑ INTERPOLATOR
(2 TIMES)
PFD LOGIC
FIN-B OUT GND
5 6 7
PFD
x ao
y
i
10 9 8
VCO PFD NC
INHIBIT
http://www.xiaoyu163.com
8
68 67 66 65
CLOCK
GENERATOR
(PRIMARY)
GAIN RATE
CONTROL CONVERTER
Q Q
3 6 7 1 3
32 33 34 35
IC3006, 3009 TC74HC161AF
VCC
16 15 14
RIPPLE
QA
CARRY
OUTPUT
CLEAR
CK
A
u163
2 3
1
.
2 9 9 4 2 8
XFSIIN
64 XFSIIN
63 CXWCK
62 EXBCK
S g P
61 EXDATAR
60 EXDATAL
59 EXIOSEL
58 BFVDD
CKCTL2
57 CKCTL2
CKCTL1
56 CKCTL1
55 TEST2
54 TEST1
53 DSDCKIO
52 DSDCKSEL2
51 DSDCKSEL1
50 DSDL
DOWN
49 DSDR
SAMPLING
48 DSD64FS
FILTER
47 DSD128FS
FSII
46 FSII
1 5 0 5 8 2 9 9 4
45 LRCK
S g P
44 BCK
43 DATA
MCKSEL SYNC
42 SYNC
SERIAL INIT/
41 INIT
CONTROL MUTE
36 37 38 39 40
13 12 11 10
QB QC QD ENABLE
T
LOAD
ENABLE
B C D P
m
co
4 5 6 7
9 9
2 8 9 9
9
8
GND