Sony STR-DA9000ES Service Manual page 130

STR-DA9000ES
QQ
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• DIGITAL BOARD IC2301 CXD9722TQ (LIP SYNC ADJUST)
Pin No. Pin Name
1 to 5 D1 to D5
VDD
6
7, 8 D6, D7
VSS
9
10 WE
CAS
11
RAS
12
CS
13
14 CLK
CKE
15
16 VDD
17 to 22 A11, A10, A0 to A3
23 VSS
24 to 29 A9 to A4
VSS
30
DRSO
31
32 DLSO
DEXRO
33
DLFEO
34
DCO
35
TE
L 13942296513
36 VDD
DRO
37
DLO
38
VSS
39
DMRO
40
41 DMLO
VSS
42
VDD
43
44 DLDRO
45 CSWO
SLSRO
46
FLFRO
47
VSS
48
49 SPDIFO
TEST1
50
TRST
51
TMS
52
53 TCK
TDI
54
TDO
55
TEST2
56
www
57 SPDIFI
VSS
58
LRCKI
59
.
BCKI
60
130
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I/O
I/O Two-way data bus with the SD-RAM
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the SD-RAM
—
Ground terminal
O Write enable signal output to the SD-RAM
O
Column address strobe signal output to the SD-RAM
O
Row address strobe signal output to the SD-RAM
O
Chip select signal output to the SD-RAM
O Clock signal output to the SD-RAM
O
Clock enable signal output to the SD-RAM
—
Power supply terminal (+3.3V)
O
Address signal output to the SD-RAM
— Ground terminal
O
Address signal output to the SD-RAM
—
Ground terminal
O
Surround R-ch data output terminal Not used
O Surround L-ch data output terminal Not used
O
Not used
O
Sub woofer data output terminal Not used
O
Center data output terminal Not used
— Power supply terminal (+3.3V)
O
Front R-ch data output terminal Not used
O
Front L-ch data output terminal Not used
—
Ground terminal
O
Data output terminal for R-ch down mix Not used
O Data output terminal for L-ch down mix Not used
—
Ground terminal
—
Power supply terminal (+3.3V)
O
Surround back audio data output to the programmable logic device
O Center and sub woofer audio data output to the programmable logic device
O
Surround audio data output to the programmable logic device
O
Front audio data output to the programmable logic device
—
Ground terminal
O Digital audio data output terminal Not used
I
Input terminal for the test
I
Reset signal input from terminal Not used
I
Mode selection signal input terminal Not used
I Clock signal input terminal Not used
I
Serial data signal input terminal Not used
O
Serial data signal output terminal Not used
I
Input terminal for the test
I Digital audio data input terminal Not used
x ao
—
Ground terminal
y
I
L/R sampling clock signal (44.1 kHz) input from the Dc cut digital filter
i
I
Bit clock signal (2.8224 MHz) input from the Dc cut digital filter
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Description
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