Internal Diagnostics - NCR PC4I Technical Reference

PRINTERS AND COMMUNICATIONS
Bit 4, the Break Interrupt detector, is set if a
break condition is recognized by the receiver. Such a
condition exists when the serial input line is at
zero beyond the length of one character consisting of
Start+ Data+ Parity+ Stop bits.
Bit 5 indicates when the Transmit Holding Register
can accept a new character for serialization and
transmission (bit set), as the most recent character
has been forwarded to the 8250's Transmit Shift
Register. This bit is reset when this register is
next written to.
Bit 6 reflects the status of the Transmit Shift
Register: this bit set indicates that the register is
idle.
Hodea Status Register
Whenever bit O, 1, 2, or 3 is set, a Modem Status
interrupt condition is asserted (see Figure 4.5).
Bits O set indicates that the CTS/ line has changed
state since the Modem Status Register was last read.
Bit 1 applies analogously to the DSR/ line.
Bit 2 is set when the trailing edge of the Ring
Indicator is detected.
Bit 3 set indicates that the RLSD/ input has changed
state.
Bits 4-7 represent the complements of the CTS/, DSR/,
RI/, and RLSD/ inputs, respectively, provided that
bit 4 in the Modem Control Register is zero. If this
bit is set, the four Modem Status Register bits
represent RTS/, DTR/, OUT1/ and OUT2/.
INTERNAL DIAGNOSTICS
The 8250 includes its own loopback diagnostic
feature, activated by writing the Modem Control
Register with bit 4 set.
4-12