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e2v EV10AS150A User Manual

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ADC EV10AS150A Evaluation Board
User Guide

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Summary of Contents for e2v EV10AS150A

  • Page 1 ADC EV10AS150A Evaluation Board User Guide...
  • Page 2 ADC EV10AS150A User Guide 0977B–BDC–09/09...

  • Page 3: Table Of Contents

    Application Information ................. 5-1 Introduction ....................5-1 Analog Inputs ....................5-1 Clock Inputs ....................5-1 Digital Outputs ..................5-1 ADC Functions..................5-2 DMUX Functions ..................5-2 Diode for Die Junction Temperature Monitoring ........5-4 Test Bench Description ................5-6 Section 6 Package Information................6-1 Thermal Characteristics ................6-1 EV10AS150A-EB User Guide 0977B–BDC–10/09...
  • Page 4 Section 7 Ordering Information................7-1 Section 8 Appendix....................8-1 EV10AS150A-EB Electrical Schematics ...........8-1 EV10AS150A-EB Board Layers..............8-9 EV10AS150A-EB User Guide 0977B–BDC–10/09...

  • Page 5: Introduction

    Introduction Scope The ADC EV10AS150A-EB Evaluation Kit is designed to facilitate the evaluation and characterization of the different versions of EV10AS150A ADC with 1:2/4 DMUX up to its 5 GHz full power input bandwidth. The ADC EV10AS150A-EB Evaluation Kit includes:...
  • Page 6 The board dimensions are 220 mm x 240 mm. The board comes fully assembled and tested, with one version of the EV10AS150A ADC installed. Figure 1-1. ADC EV10AS150A-EB Evaluation Board Simplified Schematic...

  • Page 7: Hardware Description

    Hardware Description Board Structure In order to achieve optimum full speed operation of the ADC EV10AS150A with 1:2/4 DMUX, a multilayer board structure was retained for the evaluation board. Eight copper layers are used, respectively dedicated to the signal traces, ground planes, power sup- ply planes and DC signals traces.

  • Page 8: Analog Inputs/Clock Input

    50 mm max line length 1.27 mm pitch between the differential traces 400 µm line width 40 µm thickness 850 µm diameter hole in the ground layer below the V , CLK and CLKN ball footprints EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...

  • Page 9: Digital Output

    ±1 mm line length difference between signals of two ports ±1.5 mm max line length difference between all signals 770 µm pitch between the differential traces 370 µm line width 40 µm thickness EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 10 Figure 2-6. Differential Digital Outputs 2.54 mm Pitch Connector (Example Port A) Signal Ground … AORN /DRA /DRAN AORN AOR GND GND GND GND GND GND GND GND Figure 2-7. Differential Digital Clock Outputs 2.54 Mm Pitch Connector Signal Ground EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...

  • Page 11: Reset Lines

    The reset line (DRR and ASYNCRST) were designed with the following recommendations: 50Ω lines 80 mm max line length 430 µm line width 40 µm thickness Figure 2-8. Board Layout for the Single Reset Lines e=40 µm 430 µm RO4003 200 µm EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 12 Hardware Description EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...

  • Page 13: Operating Characteristics

    Introduction This section describes a typical configuration for operating the evaluation board of the ADC EV10AS150A with 1:2/4 DMUX. The analog input signal can be entered either in differential or single ended. Refer to the datasheet for the impact of driving analog input in single or in differential. The clock input signal must be differentially driven.

  • Page 14: Electrical Characteristics

    ADC Reset Voltage –0.3 to V + 0.3 CCA3 DMUX function input voltage RS, DRTYPE, SLEEP, STAGG, BIST –0.3 to V + 0.3 DMUX Asynchronous Reset ASYNCRST –0.3 to V + 0.3 EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 15 Analog V = 3.3V CCA3 VCCA3 Digital V = 3.3V VCCD Output V = 2.5V PLUSD VPLUSD Power dissipation - 1:2 DMUX - 1:4 DMUX - NAP & SLEEP mode (1:4 or 1:2) EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...

  • Page 16: Digital Output Coding

    0 0 0 0 0 0 0 0 0 0 1 MSB bit 9 and LSB bit 0. Note: 1. Refer to chap. 4.4.4 and 4.4.5 for selection between natural binary, binary 2's complement or Gray coding. EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...

  • Page 17: Software Tools

    Section 4 Software Tools Overview The ADC EV10AS150A evaluation user interface software is a C++ compiled graphical interface. No license is required to run on a W98, NT, W2000 and XP PC. The software uses intuitive push buttons and popup menus to write data from the hardware.
  • Page 18 Software Tools Figure 4-1. Install Window Start the Setup_EV10AS15x (v1.1.2) Figure 4-2. EV10AS150A Application Set up Wizard Window EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 19 Software Tools Next step: Select Destination Directory. Figure 4-3. EV10AS150A select Destination Directory Window Next step: Start Menu Folder. Figure 4-4. EV10AS150A select Start Menu Window EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 20 Next step: verification of the install configuration. Figure 4-5. EV10AS150A Ready to Install Window If you agree with the install configuration press Install. Figure 4-6. EV10AS150A Application Setup Install Push Button The software is completing installation. Figure 4-7. EV10AS150A Completing Setup Wizard Window...
  • Page 21 Software Tools Now you can launch the ADC10Bit series software from its icon; the following screen will be displayed: Figure 4-8. ADC EV10AS150A User Interface Window Figure 4-9. ADC10-bit User Interface Hardware Implementation Evaluation Board ADC EV10AS150A Software Serial port Use a RS 232 port to send data to ADC.
  • Page 22 Installation Software At startup, the application automatically checks all RS 232 ports available on the com- puter and tries to find the evaluation board on them. Figure 4-11. ADC EV10AS150A User Interface The Port menu shows all available ports on your computer. The port currently used has a check mark on its left.

  • Page 23: Operating Modes

    Software Tools 4.3.2 Troubleshooting If the ADC EV10AS150A evaluation board is not connected or not powered, a red LED appears on the right of the Reset button and the application is grayed Figure 4-12. ADC EV10AS150A User Interface Check the connection to the PC and restart the application.
  • Page 24 The control mode allows controlling the NAP mode and Data Ready Reset Inactive mode. 4.4.2.1 NAP Mode NAP mode configurable Off or On 4.4.2.2 Data Ready Reset Data Ready Reset is inactive on High level or on Low level Inactive on Level EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 25 ADC Output Data ADC Output Data Format: MSB complement Off Format (MSB Complement) ADC Output Data Format: MSB complement On Note: Mode MSB complement is available if ADC output data format is binary EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 26 Software Tools 4.4.5 ADC Gain Adjust ADC Gain adjustment is from –0.5 to 0.5 dB. 4.4.6 ADC Offset Adjust ADC Offset adjustment is from –20 mV to 20 mV. 4-10 EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 27 – Fine adjustment: 0 to 30 ps by step of 0.118 ps – Maximum delay: 120 ps 4.4.8 Advanced Setting: Internal logic clock adjustment 0 to 30 ps on Lsb register Logic Clock Adjustment EV10AS150A-EB User Guide 4-11 e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 28 Software Tools 4.4.9 Clock Duty Cycle ADC Duty Cycle (Track-Hold): 40%-60% to 30%-70% (Track - Hold) Note: Reset value 35%-65% 4-12 EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...

  • Page 29: Application Information

    The digital outputs (data and Data Ready) are LVDS compatible. 100Ω differential termi- nation is provided on-board. Figure 5-1. Differential Digital Outputs Implementation 50Ω Line 100Ω 50Ω Line 50Ω Line 100Ω 50Ω Line EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–IMAGE–10/09...

  • Page 30: Adc Functions

    If the DRR Reset is also used, it is recommended to apply the asynchronous Reset while the DRR Reset is active. The first data is available at the device output after TOD + N cycles (with 4.5 ≤ N ≤ 7.5 depending on DEMUX mode). EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–IMAGE–10/09...
  • Page 31 - SLEEP inactive: normal mode SLEEP inactive: Jumper OUT Simultaneous or Staggered output mode - STAGG active: staggered output data STAGG: Jumper ON STAGG - STAGG inactive: simultaneous output data STAGG inactive: Jumper OUT EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–IMAGE–10/09...

  • Page 32: Diode For Die Junction Temperature Monitoring

    (hot point measurement) of both the ADC and the DMUX. Junction Temperature The measurement method consists in forcing a 1 mA current into a diode mounted Monitoring transistor. The measurement setup is described in Figure 5-5. EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–IMAGE–10/09...
  • Page 33 Figure 5-6. ADC DIODE Characteristics Junction emperature versus Diode Voltage for I = 1mA y = -1.193x + 913.714 Junction temperature (°C) EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–IMAGE–10/09...

  • Page 34: Test Bench Description

    Anar en Fs = ADC sampling data Clock Source 0˚C 180˚C Power supplies Acquisition board Acquisition board GW PPT EV10AS150A Power supplies GW PPT 4 Channel Clock GPIB Bus HP16500C Analysis Logic LabView EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–IMAGE–10/09...

  • Page 35: Package Information

    Thermal Resistance ADC Alone DMUX Alone 4.11 °C/Watt 1.48 °C/Watt RTHj-top-of-case 6.94 °C/Watt 3.89 °C/Watt RTHj-bottom-of-balls 7.98 °C/Watt 4.88 °C/Watt RTHj-board 17.13 °C/Watt 13.88 °C/Watt RTHj-ambient Note: No external heatsink is mandatory. EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–09/09...
  • Page 36 Package Information EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–09/09...

  • Page 37: Ordering Information

    For availability, contact your local EV10AS150ACTPY EBGA 317 RoHS > 0°C, T < 90°C e2v sales office. Industrial grade For availability, contact your local EV10AS150AVTPY EBGA 317 RoHS > –40°C, T < 110°C e2v sales office. EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 38 Ordering Information EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...

  • Page 39: Appendix

    Section 8 Appendix EV10AS150A-EB Electrical Schematics Note: For ADC decoupling strategy, please do not take into account the current decoupling implemented on current evaluation board which is purely experi- mental. Refer to Datasheet for recommended decoupling strategy. EV10AS150A-EB User Guide e2v semiconductors SAS 2009 0977B–BDC–10/09...
  • Page 40 Appendix Figure 8-1. Decoupling PIN Decoupling PIN V+D Decoupling PIN VCCD EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 41 Appendix Figure 8-2. Decoupling PIN V CCA3 EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 42 Appendix Figure 8-3. Decoupling PIN V CCA5 EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 43 Appendix Figure 8-4. Power Supplies Connections VCCA5 VCCA3 MN6-C EV10AS150A DG ND VCCA3 VCCA3 AGND DGND EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 44 Figure 8-5. Power Supplies Bypassing VCCA3 C69 100nF C5 100nF C70 1uF DGND DGND DGND DGND VCCA5 C4 100nF C66 100nF C2 1uF C65 1uF DGND DGND DGND DGND VCCD C3 100nF C1 1uF DGND DGND EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 45 Appendix Figure 8-6. EV10AS150A-EB Electrical Schematic (ADC DMUX) EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 46 Appendix Figure 8-7. EV10AS150A-EB Electrical Schematic (AVR) EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...

  • Page 47: Ev10As150A-Eb Board Layers

    Appendix EV10AS150A-EB Board Layers Figure 8-8. Top Layer DIODE CL KN DOR/ DRDN DRTYPE BIST COR/ DRCN CLKTYPE CL KDACTRL EVAL BOARD ADC EV10AS15x series VINN SLEEP STAGG 9001281B EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 48 Appendix Figure 8-9. Bottom Layer 8-10 EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 49 Appendix Figure 8-10. Board Equipped with Socket (Top) EV10AS150A-EB User Guide 8-11 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 50 C 1 9 6 C 1 0 7 All 100 pF caps are welded on 10 nF caps MN 3 C 127 C 123 C 121 MN 4 MN 2 C 110 C 126 8-12 EV10AS150A-EB User Guide 0977B–BDC–10/09 e2v semiconductors SAS 2009...
  • Page 51 Whilst e2v has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof and also reserves the right to change the specification of goods without notice. e2v accepts no liability beyond that set out in its standard conditions of sale in respect of infringement of third party patents arising from the use of tubes or other devices in accordance with information contained herein.

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