Sdram Data Bus, Sram External Data Bus; Sdram Address Bus, Sram External Address Bus; Sdram Clock Output; Sdram Re-Timing Clock Input - Onkyo HT-R530 Service Manual

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-10
Q201: CS494003CQZ (Multi-Standard Audio Decoder)-9/11
SD_DATA9, EXTA12
SD_DATA8, EXTA11
SDRAM data bus 15:8. SRAM external address bus 18:11. OUTPUT
SD_DATA7, EXTD7 --- SDRAM Data Bus, SRAM External Data Bus
SD_DATA6, EXTD6
SD_DATA5, EXTD5
SD_DATA4, EXTD4
SD_DATA3, EXTD3
SD_DATA2, EXTD2
SD_DATA1, EXTD1
SD_DATA0, EXTD0
SDRAM data bus 7:0. SRAM external data bus 7:0. BIDIRECTIONAL - Default: INPUT
SD_ADDR10, EXTA10 --- SDRAM Address Bus, SRAM External Address Bus
SD_ADDR9, EXTA9
SD_ADDR8, EXTA8
SD_ADDR7, EXTA7
SD_ADDR6, EXTA6
SD_ADDR5, EXTA5
SD_ADDR4, EXTA4
SD_ADDR3, EXTA3
SD_ADDR2, EXTA2
SD_ADDR1, EXTA1
SD_ADDR0, EXTA0
SDRAM address bus 10:0. SRAM external address bus 10:0. OUTPUT
SD_CLK_OUT --- SDRAM Clock Output
SDRAM clock output. OUTPUT
SD_CLK_IN --- SDRAM Re-timing Clock Input
SDRAM re-timing clock input. INPUT
SD_CLK_EN --- SDRAM Clock Enable
SDRAM clock enable. OUTPUT
TX-SR503/503E/8350