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CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16
SCL
th
SDA
8
Byte n
S
BUS ACTIVITY:
T
A
SLAVE
R
MASTER
ADDRESS
T
S
SLAVE
n = 1
P v 15
1
SCL
a 7
SDA
WP
Bit
ACK
Figure 7. Write Cycle Timing
ADDRESS
BYTE
A
A
C
C
K
K
Figure 8. Page Write Sequence
ADDRESS
BYTE
8
a 0
t
SU:WP
Figure 9. WP Timing
http://onsemi.com
t
WR
STOP
CONDITION
DATA
DATA
BYTE
BYTE
n
n+1
A
C
K
DATA
BYTE
9
1
d 7
t
HD:WP
7
START
ADDRESS
CONDITION
DATA
BYTE
n+P
A
A
C
C
K
K
8
d 0
S
T
O
P
P
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