Counter 1 Source Signal; Counter 1 Gate Signal - National Instruments NI 6711 User Manual

Counter 1 Source Signal

Counter 1 Gate Signal

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You can select any PFI as well as many other internal signals as the
Counter 1 Source (Ctr1Source) signal. The Ctr1Source signal is configured
in edge-detection mode on either rising or falling edge. The selected edge
of the Ctr1Source signal increments and decrements the counter value
depending on the application the counter is performing.
You can export the Counter 1 signal to the PFI 3/CTR 1 SOURCE pin, even
if another PFI is inputting the Ctr1Source signal. This output is set to
high-impedance at startup.
Figure 5-7 shows the timing requirements for the Ctr1Source signal.
t w
Figure 5-7. Ctr1Source Timing Requirements
The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 10 ns high or low. There is no minimum frequency.
For most applications, unless you select an external source, the
20MHzTimebase signal or the 100kHzTimebase signal generates the
Ctr1Source signal.
You can select any PFI as well as many other internal signals like the
Counter 1 Gate (Ctr1Gate) signal. The Ctr1Gate signal is configured in
edge-detection or level-detection mode depending on the application
performed by the counter. The gate signal can perform many different
operations including starting and stopping the counter, generating
interrupts, and saving the counter contents.
You can export the gate signal connected to Counter 1 to the PFI 4/CTR 1
GATE pin, even if another PFI is inputting the Ctr1Gate signal. This output
is set to high-impedance at startup.
t p
t w
t p = 50 ns minimum
t w = 10 ns minimum
5-7
Chapter 5 Counters
Analog Output Series User Manual