Schematic Diagram - Main Section (2/4) - Sony HCD-AZ1D Service Manual

7-8. SCHEMATIC DIAGRAM — MAIN SECTION (2/4) —
MAIN BOARD
TAPE
MECHANISM
DECK
(REC/PB/ERASE)
8P
LCH
REC/PB
HEAD
RCH
ERASE
0
HCD-AZ1D
• See page 45 for Waveform. • See page 46 for IC Block Diagram.
(2/4) IC302
SOUND
PROCESSOR
IC B/D
0.018
0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
4.6 -4.5
0
16 16
0.6
0(-6.2)
1.9(-11.7)
0(6.1)
9
S 1.9(-11.9)
0
S
0(0.4)
2.2(0)
0(-6.2)
2.2(0)
0(6.1) 0
2.2(-11)
0
2.1(-6.6)
0(0.4)
S
1.9(-11.9)
2.1(-6.5)
0
Q344~Q347
Q329~Q332,
BIAS OSC
Q326,Q327
0
REC/PB SWITCH
2.1(-6.5)
JR101
0
10K
10K
IC201
AMP
-4.5
0 0
0
0 0
4.5
0 0 0
-4.5
0
0.6
SWITCH
0(6.2) 0(9.6)
9.8
9.8(8.9)
0(6.8)
9.8(0)
SWITCH
0(2.1)
CN202
3P/2.0
MIC CONTROL
K
BOARD
CN250
(Page 39)
29 29
1
MAIN
BOARD (1/4)
(Page 28)
IC301
+5V REG
5.1
IC101
NJM7806FA
9
6 IC101
C 1 0 0
C 1 0 5
+6V REG
MPEG BOARD
C
(3/3)
CN3
(Page 36)
HCD-AZ1D
34
33
4
MAIN
BOARD
(4/4)
35
(Page 31)
14
15
16
17
18
19
20
21
16.5
2
22 MAIN BOARD
(3/4)
(Page 30)
0
0.6
SWITCH
23
24
No mark:FM
( ):REC