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DVO, SIL9134, HDMI
harman/kardon
Main Board Electric Diagram: DVO, SIL9134, HDMI
9134
(CLUSTER)
I2S_T_DATA0
I2S_T_DATA0
9
SD0
I2S_T_DATA1
8
I2S_T_DATA1
SD1
I2S_T_DATA2
I2S_T_DATA2
7
SD2
I2S_T_DATA3
6
I2S_T_DATA3
SD3
AUD_FS_CLK_0_A
5
AUD_FS_CLK_0_A
MCLK
AUD1_SPDIF
AUD1_SPDIF
4
SPDIF
I2S_T_CLK
11
I2 S_T_CLK
SCK
I2S_T_LR
10
I2 S_T_LR
WS
R717
33
DVO_CLK_P
1
2
88
DVO_CLK_P
IDCK
DVO_DE
1
DVO_DE
DE
DVO_HSYNC
2
DVO_HSYNC
HSYNC
DVO_VSYNC
3
DVO_VSYNC
VSYNC
98
D0
97
D1
96
D2
GND
95
D3
DVO_D0
94
DVO_D0
D4
DVO_D1
93
DVO_D1
D5
DVO_D2
92
DVO_D2
D6
DVO_D3
91
DVO_D3
D7
DVO_D4
90
DVO_D4
D8
DVO_D5
86
DVO_D5
D9
DVO_D6
85
DVO_D6
D10
DVO_D7
84
DVO_D7
D11
83
D12
82
D13
81
D14
GND
80
D15
DVO_D8
79
DVO_D8
D16
DVO_D9
78
DVO_D9
D17
DVO_D10
77
DVO_D10
D18
DVO_D11
75
DVO_D11
D19
DVO_D12
DVO_D12
74
D20
DVO_D13
73
DVO_D13
D21
DVO_D14
DVO_D14
72
D22
DVO_D15
71
DVO_D15
D23
70
D24
69
D25
68
D26
GND
67
D27
DVO_D16
DVO_D16
63
D28
DVO_D17
62
DVO_D17
D29
DVO_D18
61
DVO_D18
D30
DVO_D19
60
DVO_D19
D31
DVO_D20
DVO_D20
59
D32
DVO_D21
58
DVO_D21
D33
DVO_D22
57
DVO_D22
D34
DVO_D23
56
DVO_D23
D35
17
DL0
16
DR0
19
DL1
+3V3
18
DR1
21
DL2
20
DR2
23
DL3
22
DR3
R512
R526
R527
15
1.5K
1.5K
1.5K
DCLK
9134_~INT
GND
RESET_OUT
BSC_M1_SCL
48
BSC_M1_SCL
CSCL
BSC_M1_SDA
49
BSC_M1_SDA
CSDA
50
CI2CA
52
RSVDL
RESET_OUT
25
RESET*
9134_~INT
24
9134_~INT
INT
TQFP100
GND
I2C ADDR:76h/W
+1V8
C529
C538
C540
C528
C533
C531
C532
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
47UF
GND
HDMI --> Design notes and Layout Guidelines:
1- HDMI Data and clockP/N traces must be routed as 100 Ohms Differential pairs. Traces width and gap according to PCB stackup.
2- Match trace lenght of P/N differential pairs. 20 mils max within a pair and 100 mils max between pairs.
3- Route differential pairs above the GND plane. Do not split the GND plane under differential pairs.
4- Use minimum number of VIA.
5- When possible, use higher clearance distance between differantials pairs and any others traces (>15 mils).
6- If higher than 2KV protection is necessary on HDMI port use low capacitance ESD protections close to the HDMI connector.
7- Consider limiting current to Maximum 500mA on HDMI 5V power.
BDP 1 / BDP 10 Service Manual
+1V8
L500
+1V8
1
2
U3
100Ohms
C530
12
CVCC18-1
C500
C501
C527
55
CVCC18-2
64
0.1UF
CVCC18-3
0.1UF
0.1UF
47UF
76
CVCC18-4
99
GND
CVCC18-5
9134_PVCC1
L501
28
GND
GND
GND
PVCC1
42
9134_PVCC2
1
2
PVCC2
100Ohms
+1V8
32
C504
C503
C502
AVCC18-1
C535
38
+3V3
AVCC18-2
0.1UF
0.1UF
47UF
14
0.1UF
IOVCC33-1
53
IOVCC33-2
66
IOVCC33-3
GND
HDMI_CEC
89
GND
GND
GND
IOVCC33-4
+5V
44
AVCC33
45
DDCPWR5V
+5V
R500
1.5K
1%
+1V8
1
2
R513
100MW
698
1%
27
9134_EXT_SWING
1
2
R501
EXT_SWING
1
2
100MW
1.5K
1%
INA-1KV
INA-1KV
INA-1KV
100MW
TV S1
TV S2
TV S3
40
1080P_HDMI_DATA2_P
TX2+
1080P_HDMI_DATA2_N
39
TX2-
37
1080P_HDMI_DATA1_P
TX1+
1080P_HDMI_DATA1_N
36
TX1-
34
1080P_HDMI_DATA0_P
TX0+
1080P_HDMI_DATA0_N
33
TX0-
1080P_HDMI_CLK_P
31
TXC+
1080P_HDMI_CLK_N
30
TXC-
1080P_HDMI_SCL
46
DSCL
1080P_HDMI_SDA
47
DSDA
1080P_HDMI_HTPLG
51
HPD
R528
47.5K
+5V
2008.5.19
GND
26
AGND1
29
GND
AGND2
35
AGND3
41
AGND4
43
AGND5
13
GND1
54
GND2
65
GND3
87
GND4
100
GND5
SIL9134CTU
GND
77h/R
+3V3
C526
C539
C537
C536
0.1UF
0.1UF
0.1UF
10UF/10V
GND
47
+3V3
R13
25.5K/NC
PMBF170/NC
Q6
HDMI_CEC
s
d
C10
47PF/NC
GND
HDMI
+5V
5VA
GND
(CLUSTER)
R9
INA-1KV
2
1
TV S4
J3
100K/NC
100MW
HDMI CONNECTOR
1%
1
TMDS_DATA_2_P
2
TMDS_DATA_2_SHIELD
3
TMDS_DATA_2_N
4
TMDS_DATA_1_P
5
TMDS_DATA_1_SHIELD
6
TMDS_DATA_1_N
7
TMDS_DATA_0_P
8
TMDS_DATA_0_SHIELD
9
TMDS_DATA_0_N
10
TMDS_DATA_CLK_P
11
TMDS_DATA_CLK_SHIELD
TV S5
TV S6
TV S7
TV S8
12
TMDS_DATA_CLK_N
INA-1KV
INA-1KV
INA-1KV
INA-1KV
HDMI_CEC_A
13
CEC
14
GND
RESERVED
15
SCL
16
SDA
17
DDC/CEC_GROUND
HDMI_PWR
18
5V_SUPPLY
19
HOT_PLUG_DETECT
20
C8
MTG1
21
MTG2
22
MTG3
0.1UF
23
MTG4
500254-1931
U4
GND
1
5
C524
VIN
OUT
R14
I2C ADDR:A0h/W
+3V3
3
ON
4.64K
1%
2
4
1
2
GND
FLAGB
0.1UF
100MW
FPF2100
SOT23-5
GND
HDMI_7440_~PWR_FAULT
HDMI_7440_~PWR_FAULT
(CLUSTER)
A1h/R
*Noise measured at this point
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