Sony CDP-XE200 Service Manual page 10

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Pin No. Pin Name
48 64DATA
49 64BCLK
50 64LRCK
51 GTOP
52 XUGF
53 XPLCK
54 GFS
55 PFCK
56 C2PO
57 XRAOF
58 MNT3
59 MNT2
60 MNT1
61 MNT0
62 XTAI
63 XTAO
64 XTSL
65 DVSS
66 FSTI
67 FSTO
68 FSOF
69 C16M
TE
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70 MD2
71 DOUT
72 EMPH
73 WFCK
74 SCOR
75 SBSO
76 EXCK
77 SUBQ
78 SQCK
79 MUTE
80 SENS
81 XRST
82 DIRC
83 SCLK
84 DFSW
85 ATSK
86 DATA
87 XLAT
88 CLOK
89 COUT
90 DVDD
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91 MIRR
92 DFCT
93 FOK
.
94 FSW
95 MON
96 MDP
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I/O
O DA 14 output when PSSL=1. 64-bit slot data when PSSL=0. (Not used.)
O DA 13 output when PSSL=1. 64-bit slot data when PSSL=0. (Not used.)
O DA 12 output when PSSL=1. 64-bit slot data when PSSL=0. (Not used.)
O DA 11 output when PSSL=1. GTOP output when PSSL=0. (Not used.)
O DA 10 output when PSSL=1. XUGF output when PSSL=0. (Not used.)
O DA 09 output when PSSL=1. XPLCK output when PSSL=0.
O DA 08 output when PSSL=1. GFS output when PSSL=0.
O DA 07 output when PSSL=1. RFCK output when PSSL=0.
O DA 06 output when PSSL=1. C2PO output when PSSL=0. (Not used.)
O DA 05 output when PSSL=1. XRAOF output when PSSL=0. (Not used.)
O DA 04 output when PSSL=1. MNT3 output when PSSL=0.
O DA 03 output when PSSL=1. MNT2 output when PSSL=0.
O DA 02 output when PSSL=1. MNT1 output when PSSL=0.
O DA 01 output when PSSL=1. MNT0 output when PSSL=0.
I X'tal oscillator circuit input
O X'tal oscillator circuit output (Not used.)
I X'tal selection input pin (Ground)
– Digital Ground
I 2/3 divider input of pins 62 and 63.
O 2/3 divider output of pins 62 and 63.
O (Not used.)
O 16.9344MHz output (Not used.)
I Digital-out ON/OFF control pin (+5V)
O Digital-out output pin
O Playback disc output in emphasis mode. (Not used.)
O WFCK output
O Sub-code sync output
O Sub-P through Sub-W serial output (Not used.)
I Clock input for SBSO read-out. (Ground)
O Sub-Q 80-bit output
I Clock input for SQSO read-out.
I Muting selection pin
O SENS output
I System reset
I Used in 1-track jump mode (+5V)
I SENS serial data read-out clock
I DFCT selection pin (Ground)
I Input pin for anti-shock. (Ground)
I Serial data input, supplied from CPU.
I Latch input, supplied from CPU.
I Serial data transfer clock input, supplied from CPU.
O Numbers of track counted signal output. (Not used.)
– Digital power supply
O Mirror signal output
O Defect signal output
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O Focus OK output
i
O Output to select spindle motor output filter. (Not used.)
O Output to control ON/OFF of spindle motor. (Not used.)
O Output to control spindle motor servo
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