Dg-Board (2 Of 4) Block Diagram - Panasonic TH-65PX600U Service Manual

TH-65PX600U

15.18. DG-Board (2 of 4) Block Diagram

TO
H2
DG2 2
1
2
3
4
TO
DG1
H1
HDMI_SR 29
HDMI_SL 27
SUB_Y
SUB_Y 57
SUB_PB
SUB_PB 55
SUB_PR
SUB_PR 53
MAIN_Y
MAIN_Y 67
MAIN_PB
MAIN_PB 65
MAIN_PR
MAIN_PR 63
PC_R
PC_R 51
PC_G
PC_G 49
PC_B
PC_B 47
PC_HS
PC_HS 45
PC_VS
PC_VS 43
MAIN_L
MAIN_L 31
MAIN_R
MAIN_R 33
BS_SL
BS_SL 35
BS_SR
BS_SR 37
BS_Y(V)
DVB_Y 41
BS_C
DVB_C 39
VIDEO_OUT
VIDEO_OUT 21
77
SL
SL
SL 78
SR 73
SR
SR 74
SOS
SOS 1
AUDIO_MUTE
7
AUDIO MUTE
AV-SW POWER SW POWER_SW
6
(SP_MUTE)
A_MON_MUTE
A MON MUTE
5
/MSP .RESET
RST
RST 4
SCL0B 16 SCL0B
15
SDA0B SDA0B
SUB3.3V
80
SUB3.3V
BT30V
BT30V 70
STBY3.3V
BT30V 69
STBY5V
STB3.3V 8
STB5V 3
STB3.3V
TH-65PX600U
DG-Board (2 of 4) Block Diagram
TO
PA20
3 4 5 7 8 DG20 2 4 5 6 7 8 10 11 15 18 19 20 21 23 25 27 29 30 32 33 34
SUB5V SUB9V
MAIN2_3.3V
MAIN1.8V
MAIN9V
MAIN5V
MAIN3.3V
IC4020
GC3FS
SCL1 65 SCL
SDA1 64 SDA
SUB_PR
Q4044,Q4052
35 VIN2
SUB_PB
Q4043,Q4051 30 VIN1
SUB_Y
Q4046,Q4054
40 VIN3
SUB_CC
Q1131,Q1135
CC_MAIN
Q1130,Q1134
MCU_RST
SCL2
SW_OFF_DET STBY5V SUB5V
SDA2
MAIN_Y
Q4050,Q4058
IC1108
RESET
MAIN_PB
Q4057
4 2
OUT VDD
MAIN_PR
Q4056
PC_G
IC1110 STB5V SUB5V
STB 1.5V
PC_B
4 VOUT VIN 5
PC_R
Q1140,Q1141
PC_HS
PC_VS
IC1104
STBY 3.3V
RESET
STB5V
(SUB5V BACK UP)
3 VOUT VIN 4
IC4016
1 RESET CE 6
AVR 1.8V
Q1114 Q1116
1 VDD VOUT
Q1111 Q1108
38 39 40
STBY3.3V
IC4013
MAIN5V
AD 3.3V
MAIN2_1.8V AD 3.3V HDMI_CEC
HDMI_SEL
8 1
VIN VOUT
HDMI_WP
HDMI_INT
TP4029
5 CONT
HDMI_5V_DET1
HDMI_5V_DET3
HPD3
HPD2
HPD1
HDMI_RST
HDMI_5V_DET2
HDMI_DAC_PD
HDMI_CE2
FRCK
XTAL IN 16
CLKINB
CLK0 94
DG DIGITAL SIGNAL PROCESSOR
HSIB
HPO 73
VSIB
VPO 72 MICOM
JTAG_TRST
TRST 22
HDMI INTERFACE
UBOUT0 93
UBOUT7 85
YGOUT0 93
85
YGOUT7
NRST 61
IC4019
CVBS0
10bit A/D(ADV7499)
78
RESET
82
SCLK
81 SDA
YOUT0
3D/2D com CHROMA
AIN6
76 VPK
DEM.
COLOUR
AIN5 A/D MATRIX
DETECT
YOUT7
74 (10bit)
RGB
SW UVOUT0 29
->YUV
AIN4
72
UVOUT9
ROUT0 33
AIN1
54
Detection
ROUT3 30
Sync
AIN2 A/D
56 525i/p
(10bit)
625i/p DCLK_IN
720p
AIN3
58
1080i
Macrovision
HS_IN
86
SELF,ID,ED2
VS_IN
85
NOISE LEVEL
SYNC
CLK
SEPA
IC4035
IC4018
MAIN3.3V DDR2.5V
DDR 2.5V
1.8V MAIN3.3V MAIN1.8V
MAIN 1.8V
8 VIN VOUT 1
5 1 VDD VOUT 5 5 CONT
98
Q1142,Q1143 186 HDMI_CEC
165 CECINA
51 HDMI_SEL
183 HDMI_WP
184 HDMI_INT
IC1103
185 HDMI_5V_DET1
190 HDMI_5V_DET3 MAIN MICOM
HPD3
193
195 HPD2
196 HPD1
197 HDMI_RST
198 HDMI_5V_DET2
HDMI_CE1
199
200 HDMI_CE2
151 142 61
Q4920
Q4921
NRST
TCK
TCK
JTAG
TRST
TRST
CLKINB
CLKINB1
CLKINB2
CLKINB2
HSIB
HSIB
14
VSIB
VSIB
7 AP_DE
AP_DE
94
REFCH_HDMI
REFCK_HDMI
91
PORT-B
22
(FS&HDMI)
41
42
PORT-A
3D
Y/C
(ADV7499)
XTAL 38 REFCK_ADV
35 CLK0A
LLC1 36 CLKIA
HS 4 HSIA
VS 99 VSIA
A_DDR_CLK
A_DDR_NCLK
IC4038
128M DDR SDRAM
IC4037
B_DDR_CLK
CK
GC5 PROCESSOR
B_DDR_NCLK
CK
TH-65PX600U
DG-Board (2 of 4) Block Diagram
42 45 52 46 162 159 160 187 138
11
12
13
14
PORT_C
(PEAKS)
DIGITAL RESIZE
MIX
INPUT
NR
15
I/F
I/P CONV.