Pin Configuration - Philips LC4.7E Service Manual

Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.11.2 Diagram A7, Type GM1501 (IC7401)
Block Diagram
14.318 MHz
Crystal
Reference
DVI-Compliant
Input
DDC2Bi
DVI
Analog RGB
Input
DDC2Bi
analog
8/16/24 bit
video
(4:4:4/4:2:2/
CCIR656)
8/16 bit video
4:2:2/CCIR656

Pin Configuration

A
B
C
D
E
ADC_AGNDADC_AGND ADC_3.3 ADC_AGND
F
G
H
J
K
L
OCM_INT2 OCM_INT1
M
OCM_UDO OCM_UDI
N
VGA_SDA VGA_SCL
P
OCM_CS1n OCM_CS2n MSTR_SDA MSTR_SCL
R
ROM_CSn OCM_REn OCM_WEn
OCMADDR
T
OCMADDR
U
OCMADDR
V
OCMADDR
W
OCMADDR
Y
AA OCMADDR
AB
OCMDATA13 OCMDATA14 OCMDATA15
AC
OCMDATA10 OCMDATA11 OCMDATA12
AD OCMDATA9 OCMDATA6OCMDATA3OCMDATA0
AE OCMDATA8 OCMDATA5OCMDATA2
AF OCMDATA7 OCMDATA4OCMDATA1
2-wire
Serial I/F
JTAG GPIO
Interface X186
Micro-
controller
Internal
Clock
RAM
Generation
Ultra-Reliable
DVI Rx
Image
Capture
and
Measure
Triple ADC
ment
and PLL
Test Pattern
Generator
Image
Capture
and
Measure
ment
NC ADC_3.3 ADC_1.8 ADC_1.8 ADC_DGND
BLUE- BLUE+ ADC_3.3 DVI_GND
ADC_DGND
GREEN- GREEN+ SOG ADC_AGND
RED- RED+ ADC_3.3 ADC_AGND
VDDD33_ VSSA33_ VDDA33_
NC
PLL RPLL RPLL
VDDA33_ VSSD33_
TCLK XTAL
FPLL PLL
VDDD33_ VSSA33_ VDDA33_ VSSA33_
SDDS SDDS SDDS FPLL
VDDD33_ VSSA33_ VDDA33_ VSSD33_
DDDS DDDS DDDS SDDS
ACS_ VSSD33_
RESETn NC
RSET_HD DDDS
AVSYNC AHSYNC
IR0 IR1
DVI_SDA DVI_SCL
EXTCLK
OCMADDR OCMADDR
OCM_CS0n
17 18 19
OCMADDR OCMADDR OCMADDR
13 14 15 16
OCMADDR OCMADDR OCMADDR
9 10 11 12
OCMADDR OCMADDR
IO_3.3
6 7 8
OCMADDR OCMADDR
IO_3.3
3 4 5
OCMADDR OCMADDR
IO_3.3
0 1 2
IO_3.3
GPIO_G09_ B2
IO_3.3
(
GPIO_G09_ B3
(
GPIO_G09_ B0 GPIO_G09_ B4
( DERED0 ) (
GPIO_G09_ B1 GPIO_G09_ B5
DERED1
( ) (
1 2 3 4
Figure 9-6 Internal Block Diagram and Pin Configuration
Parallel
ROM
IF/external
micro
Infra-red Rx
External
ROM I/F
Internal
ROM
Graphics Graphics
Shrink Zoom
Filter Filter
OSD
Frame
Controller
Store
Control
Color Table
RAMs
Motion
Video Adapt.
Video
Shrink
Zoom
Filter 3:2/2:2
Filter
detection
DDR SDRAM
I/F
RXC+ DVI_GND RX0+
RXC- DVI_GND RX0-
NC DVI_3.3 DVI_GND DVI_3.3 DVI_3.3
NC DVI_1.8 DVI_GND DVI_1.8 DVI_1.8
GPIO_G07_ B2
IO_3.3 DCLK IO_3.3
DEGRN0 ) ( DERED4
GPIO_G08_ B0 GPIO_G08_ B5 GPIO_G07_ B3
DEN
DEGRN1 DORED0 DOBLU1 DERED5
) ( ) ( ) (
GPIO_G08_ B1 GPIO_G08_ B3 GPIO_G07_ B0 GPIO_G07_ B4
DEBLU0 ) ( DORED1 ) ( DOGRN1 ) ( DERED2 ) ( DERED6
GPIO_G08_ B2 GPIO_G08_ B4 GPIO_G07_ B1 GPIO_G07_ B5
DEBLU1 DOGRN0 DOBLU0 DERED3 DERED7
) ( ) ( ) ( ) (
5 6 7 8
LC4.7E AA
Low Pulse Width
Ba ndwid th Modulator
A DC
TTL/
LVDS
Tx
Display
Timing
Generator
TM
RealColor
Output
Blender
RX1+ RX2+ DVI_GND LBADC_IN3 D_GND
RX1- RX2- REXT LBADC_IN2 D_GND
DVI_3.3 DVI_3.3 LBADC_IN1 LBADC_33
LBADC_
DVI_1.8 DVI_GND LBADC_GND
RETURN
CORE_1.8 CORE_1.8 D_GND D_GND
D_GND CORE_1.8 D_GND D_GND
D_GND D_GND D_GND D_GND
D_GND D_GND D_GND D_GND
D_GND D_GND D_GND D_GND
D_GND D_GND D_GND D_GND
D_GND CORE_1.8 D_GND D_GND
CORE_1.8 CORE_1.8 D_GND D_GND
SHIELD[1]
IO_3.3 LVDSB_3.3
LVDSB_GND
) (DEGRN3)
GPIO_G07_ B6 SHIELD[2]
LVDSB_3.3 LVDSB_3.3
) ( DERED8 ) (DEGRN4)
GPIO_G07_ B7 SHIELD[3] BC+ SHIELD[4]
) ( DERED9 ) (DEGRN5) (DEGRN8) (DEBLU2)
SHIELD[0] B3+ B3-
) (DEGRN2) (DEGRN6) (DEGRN7) (DEGRN9)
9 10 11 12
E_14490_099.eps
9. EN 71
Panel Data
/Control
BC-
13
060804