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Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.11.2 Diagram A7, Type GM1501 (IC7401)
Block Diagram
14.318 MHz
Crystal
Reference
DVI-Compliant
Input
DDC2Bi
DVI
Analog RGB
Input
DDC2Bi
analog
8/16/24 bit
video
(4:4:4/4:2:2/
CCIR656)
8/16 bit video
4:2:2/CCIR656
Pin Configuration
A
B
BLUE-
C
GREEN-
D
RED-
E
ADC_AGNDADC_AGND ADC_3.3 ADC_AGND
F
VDDA33_
G
FPLL
VDDD33_
H
SDDS
VDDD33_
J
DDDS
K
RESETn
L
OCM_INT2 OCM_INT1 AVSYNC
M
OCM_UDO OCM_UDI
N
VGA_SDA VGA_SCL DVI_SDA
P
OCM_CS1n OCM_CS2n MSTR_SDA MSTR_SCL
R
ROM_CSn OCM_REn OCM_WEn EXTCLK
OCMADDR
T
OCMADDR
U
OCMADDR
V
OCMADDR
W
OCMADDR
Y
AA OCMADDR
AB
OCMDATA13 OCMDATA14 OCMDATA15
AC
OCMDATA10 OCMDATA11 OCMDATA12
AD OCMDATA9OCMDATA6OCMDATA3OCMDATA0
AE OCMDATA8OCMDATA5OCMDATA2
AF OCMDATA7OCMDATA4OCMDATA1
2-wire
Serial I/F
JTAG GPIO
Interface
X186
Micro-
controller
Internal
Clock
RAM
Generation
Ultra-Reliable
DVI Rx
Image
Capture
and
Measure
Triple ADC
ment
and PLL
Test Pattern
Generator
Image
Capture
Video
and
Shrink
Measure
Filter
ment
NC
ADC_3.3
ADC_1.8
ADC_1.8
ADC_DGND
BLUE+
ADC_3.3
ADC_DGND
DVI_GND
GREEN+
SOG
ADC_AGND
NC
RED+
ADC_3.3 ADC_AGND
NC
VDDD33_
VSSA33_
VDDA33_
NC
PLL
RPLL
RPLL
VSSD33_
TCLK
XTAL
PLL
VSSA33_
VDDA33_
VSSA33_
SDDS
SDDS
FPLL
VSSA33_
VDDA33_
VSSD33_
DDDS
DDDS
SDDS
ACS_
VSSD33_
NC
RSET_HD
DDDS
AHSYNC
IR0
IR1
DVI_SCL
OCMADDR
OCMADDR
OCM_CS0n
17
18
19
OCMADDR
OCMADDR
OCMADDR
13
14
15
16
OCMADDR
OCMADDR
OCMADDR
9
10
11
12
OCMADDR
OCMADDR
IO_3.3
6
7
8
OCMADDR
OCMADDR
IO_3.3
3
4
5
OCMADDR
OCMADDR
IO_3.3
0
1
2
IO_3.3
GPIO_G09_ B2
IO_3.3
(
DEGRN0
)
GPIO_G09_ B3
DEGRN1
(
)
GPIO_G09_ B0
GPIO_G09_ B4
DERED0
DEBLU0
(
)
(
)
GPIO_G09_ B1
GPIO_G09_ B5
(
DERED1
)
(
DEBLU1
)
1
2
3
4
5
Figure 9-5 Internal Block Diagram and Pin Configuration
Parallel
ROM
IF/external
micro
Infra-red Rx
Low
External
Ba
ndwid
th
ROM I/F
A
DC
Internal
ROM
Graphics
Graphics
Shrink
Zoom
Filter
Filter
OSD
Frame
Controller
Store
Output
Control
Blender
Color Table
RAMs
Motion
Adapt.
Video
Zoom
3:2/2:2
Filter
detection
DDR SDRAM
I/F
RXC+
DVI_GND
RX0+
RX1+
RX2+
RXC-
DVI_GND
RX0-
RX1-
RX2-
DVI_3.3
DVI_GND
DVI_3.3
DVI_3.3
DVI_3.3
DVI_1.8
DVI_GND
DVI_1.8
DVI_1.8
DVI_1.8
CORE_1.8 CORE_1.8
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
CORE_1.8 CORE_1.8
GPIO_G07_ B2
IO_3.3
DCLK
IO_3.3
IO_3.3
(
DERED4
)
GPIO_G08_ B0
GPIO_G08_ B5
GPIO_G07_ B3
GPIO_G07_ B6
DEN
DORED0
DOBLU1
DERED5
(
)
(
)
(
)
(
DERED8
GPIO_G08_ B1
GPIO_G08_ B3
GPIO_G07_ B0
GPIO_G07_ B4
GPIO_G07_ B7
DORED1
DOGRN1
DERED2
DERED6
DERED9
(
)
(
)
(
)
(
)
(
GPIO_G08_ B2
GPIO_G08_ B4
GPIO_G07_ B1
GPIO_G07_ B5
SHIELD[0]
(
DOGRN0
)
(
DOBLU0
)
(
DERED3
)
(
DERED7
)
(DEGRN2)
6
7
8
9
10
LC4.6U
Pulse Width
Modulator
TTL/
Panel Data
LVDS
/Control
Tx
Display
Timing
Generator
TM
RealColor
DVI_GND LBADC_IN3
D_GND
REXT
LBADC_IN2
D_GND
DVI_3.3 LBADC_IN1 LBADC_33
LBADC_
DVI_GND
LBADC_GND
RETURN
D_GND
D_GND
CORE_1.8
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
CORE_1.8
D_GND
D_GND
D_GND
D_GND
SHIELD[1]
LVDSB_3.3
LVDSB_GND
(DEGRN3)
SHIELD[2]
LVDSB_3.3 LVDSB_3.3
)
(DEGRN4)
SHIELD[3]
BC+
SHIELD[4]
)
(DEGRN5)
(DEGRN8)
(DEBLU2)
B3+
B3-
BC-
(DEGRN6)
(DEGRN7)
(DEGRN9)
11
12
13
E_14490_099.eps
241204
9.
EN 83
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