SERVICE MANUAL Model: LCT2662 Safety Instructions Features & Specifications Block Diagram Wiring Diagram Disassembly Schematic & Component Diagrams Bill of Material Pin Descriptions Exploded View Diagram This manual is the latest at the time of printing, and does not include the modification which may be made after the printing,...
I. Safety Instructions The l ig h tn i ng fla sh w i th arro wh e ad symb ol , within an equilatera l triangle, is intended to alert the user to the presence of uninsulated “dangerous CAUTION voltage”...
PRODUCT SAFETY NOTICE 4. Completely discharge the high pote ntial voltage of the picture tube before handli ng. The pi cture tube is a Many e lectrical an d mechanica l parts in this TV vacuum and if bro ken, the gl ass will explode. receiver have special safety-related characteristics.
Page 4
FEATURES ●POWER SUPPLY:AC 90~264V 50/60Hz ●MULTI TV SYSTEM:NTSC M ●MULTISTANDARD SOUND PROCESSORS:,BTSC+SAP ●MULTI VEDEO SYSTEM:PAL/NTSC/SECAM ●VERSATILE INPUT SOURCES: TV,AV1,AV2,S-VIDEO,YCbCr,YPbPr,DVI,PC(ANALOG) ●FULL FUNCTION REMOTE CONTROLLER ●EXCELLENT SOUND EFFECT WITH VOLUME,TRABLE, BASS, BALANCE, AVC ADJUSTABLE, AUDIO MODE, SPACIAL EFFECT, EQUALIZER ●SMART SOUND & PICTURE MODE SET: PERSONAL,CINEMA, SPEECH, MUSIC;...
4 . 5 M H z ( B T S C ) 4 2 . 1 7 M H z C H R O M A I F F R E Q U E N C Y U S A 2 1 6 C h a n n e l ( A I R 2 - 8 3 C h a n n e l ) C H A N N E L S R E C E I V E D...
Page 6
PART3:PANEL Brand & Model CHIMEI/V270W1-L03 Resolution 1280X720 Displayable Colour 16.7MHz Surface Hard Coating + Anti-Radiation Viewing Angle (H/V) 170° (Hor) / 170° (Ver) Display Response Time 25ms Contrast Ratio 1:600 Brightness 550nit Aspect 16;9 Lamp Life 50,000Hrs Bad Pixel Quality (Bright/Dark/Total) 2/6/8...
Page 11
C38 is the bypass cap for Q1 5.6K R192 470 0.22 V-RED V-RED VOUT 9014 VOUT 33pF 0_NS U26 bypass cap R193 470 0.22 V-GRN V-GRN CCVIN VIDEO 33pF R194 470 0.22 VINHS V-BLU HS_IN V-BLU VINVS VS_IN 33pF GREEN BLUE VINHS V-BOX...
Page 12
VOUT VOUT VCC is 5V power supply from the power socket VDD is 3.3V digital power supply, +5 is 5V RST1# RST1# analog power supply for U1 VPC3230D; VTT is 5V power supply for U2 FI1256MK2 (TV Tuner) 5,6,9,10,11 0.22 (VSTBY) 1.2K 0.68...
Page 15
VDD1 (G-PORT) GRAPHIC VDD1 BUFFERED GRAPHIC BUS 1,6,7 GRAPHIC G-PORT 6,7,9 +2.5 VDD1 GPVS GHSSOG GPSOG GFBK GPFBK C165 C166 C167 GCLK GPCLK 47uF/16V 47uF/16V 47uF/16V C142 C143 +2.5 GPR7 BGND BGND BGND GPR6 GPR5 GPR4 VYY is 2.5V display PLL power supply of U7, VZZ is 2.5V memory PLL power supply of U7, Bypass caps for U27 GPR3...
Page 16
VIDEO BUS MEMORY BUS VID_BUS MEM BUS MEM_BUS 3,10 4,5,6,8 G-PORT DISPLAY PORT 6,7,8 G-PORT D-PORT 11,12 PWNMI VDD1 C169 C171 C173 14.318 DRO7 DRO7 DRO6 DRO6 RP27 R130 DRO5 DRO5 2.2M DRO4 VYUV7 DRO4 DRO3 VYUV6 DRO3 DRO2 VYUV5 DRO2 RP28 DRO1...
Page 17
MEMORY BUS MEM_BUS VDD1 Short JP1 3-4 when writing flash VDD1 FVPP Short JP1 1-2 for write protect. For AMD single power flash, FWP# this jumper is not used. R233 R144 VDD1 74ACT32 VDD1 3.3K RNMI R145 R153 PWNMI PWNMI PWA19 3.3K BYTE#...
Page 24
Disassembly In case of trouble, etc., Necessitating disassemble, please disassemble in the order shown in the illustrations. Reassemble in the reverse order. 1. Removal of the Back Cover 2. Removal of the MAIN PCB a. Remove the screws. Slide out the LCD chassis slightly; pull up the connector of AC cord from PCB; pull up the PCB from LCD.
Page 37
4121024114J40 CARBON RES 1.000 R42 RT14-1/4W-240Ω-J 4121051214J40 1.000 R39 CARBON RES1/4W-5.1KΩ 4121051314J40 1.000 R38 CARBON RES1/4W-51KΩ 4123068305J20 2.000 R17 R20 METAL OXIDE RES 5W-68K-J 41230R3305J20 METAL OXIDE RES 1.000 R40 RY-5W-0.33Ω-J 41230R5105J20 METAL OXIDE RES 1.000 R13 5W-0.51R-J 4129008R05A00 HEAT VARIABLE RES 5A 8R 1.000 RT1 412A07D471K00 1.000 RV1...
Page 38
4130151102M00 3.000 C9 C21, HIGH VOLTAGE CERAMIC CAPACITOR 1000V-151-M 4136104271M02 X CAP 1.000 C4 AC275V-104-M(K) 4136221401M00 Y CAP221 400V 3.000 C1,C3,C26 4136222251M00 2.000 C29,C37 Y CAP AC250V-222-M(K) 4136684271M03 X CAP 1.000 C54 AC275V-684-M(K) 4138105401K00 1.000 C5 METAL MYLAR CAP 400V-105-K 4140101451M00 CAP- EL DL:18*35(105°) 2.000 C7 C19...
Pin Descriptions Pinout Information Pin Descriptions Table 2-1 provides detailed Video Port pin descriptions. Table 2-1 Video Port Pin Descriptions Name Pin(s) Type Function VPort Pixel Clock. The VCLK pin is used for video port image capture. VCLK ID 5 The polarity can be selected by the VCLKPOL bit.
Page 62
Pinout Information Pin Descriptions Table 2-2 provides detailed Graphics Port pin descriptions. Table 2-2 Graphics Port Pin Descriptions Name Pin(s) Type Function GPort Pixel Clock. The GCLK pin is used for graphics port image capture. The polarity can be selected by the GCKPOL bit.The GCLK GCLK ID 5 input can be disabled by the GCLKOFF bit to reduce power...
Page 63
Pin Descriptions Pinout Information Table 2-2 Graphics Port Pin Descriptions (continued) Name Pin(s) Type Function GRE0 ID 5 GRE1 ID 5 GRE2 ID 5 GRE3 ID 5 GPort Red Pixel Data. GPort Red Even Pixel Data when in 48-bit input mode.
Page 64
Pinout Information Pin Descriptions Table 2-3 Display/Graphics Port Pin Descriptions (continued) Name Pin(s) Type Function DGG0 I/O SR5 DGG1 I/O SR5 DGG2 I/O SR5 DGG3 I/O SR5 DGPort Green Pixel Data. In dual pixel output mode these pins are the ODD green outputs.
Page 65
Pin Descriptions Pinout Information Table 2-4 Display Port Pin Descriptions (continued) Name Pin(s) Type Function DPort Pixel Enable. This signal is active whenever valid data is present. The polarity is specified by the DENPOL bit. DPort Red Pixel Data. In dual pixel output mode these pins are the EVEN red outputs.
Page 66
Pinout Information Pin Descriptions Table 2-5 provides detailed Microprocessor Interface pin descriptions. Table 2-5 Microprocessor Interface Pin Descriptions Name Pin(s) Type Function I/O D5 Write Enable. Low indicates a write to external RAM or other devices. I/O D5 Read Enable. Low indicates a read to external RAM or other devices. ROMOE ROM Output Enable.
Page 67
Pin Descriptions Pinout Information Table 2-5 Microprocessor Interface Pin Descriptions (continued) Name Pin(s) Type Function I/O D5 I/O D5 I/O D5 I/O D5 I/O D5 I/O D5 I/O D5 I/O D5 Microprocessor 16-bit bidirectional data bus. I/O D5 I/O D5 I/O D5 I/O D5 I/O D5...
Page 68
Pinout Information Pin Descriptions Table 2-6 Peripheral Interface Pin Descriptions (continued) Name Pin(s) Type Function General-purpose I/O port bit controlled by PADAT5 and PAEN5. This pin has other possible functions depending on the IREN, EIEN registers. • When EIEN=1 and PAEN5=1, this pin can function as an external PORTA5 I/O U5 interrupt to the on-chip CPU.
Page 69
Pin Descriptions Pinout Information Table 2-6 Peripheral Interface Pin Descriptions (continued) Name Pin(s) Type Function General purpose I/O port bit controlled by PBDAT4 and PBEN4. PORTB4 can also function as: Function When in DG1E Dual-pixel 27-bit output mode 30-bit output mode PORTB4 I/O D5 GRO4...
Page 70
Pinout Information Pin Descriptions Table 2-6 Peripheral Interface Pin Descriptions (continued) Name Pin(s) Type Function PORTC0 I/O D5 General purpose I/O port controlled by PCDAT(7:0) and PCEN(7:0). PORTC(7:0) can also function as: PORTC1 I/O D5 PORTC2 I/O D5 Function When GBO(7:0) 48-bit graphics input mode PORTC3...
Page 71
Pin Descriptions Pinout Information Table 2-9 provides detailed Power and Ground pin descriptions. Table 2-9 Power and Ground Pin Descriptions Name Pin(s) Type Function 16,37,65,84, VDD1 1.8V digital core power. 137,185 17,38,66,85, Digital core ground. 138,186 29,52,72,86, VDDQ3 104,123,140, 3.3V digital I/O power. 171,208 1, 30, 53, 73, 87, VSSQ...
Page 73
Pin Descriptions Pinout Information 2.2.1 Video Port Pins Table 2-1 provides detailed pin descriptions for the Video Port. Table 2-1 Video Port Pin Descriptions Name Pin(s) Type Function Primary Video (PV) Port horizontal sync input. Indicates start of next line of input data. This signal is internally polarity corrected (PVHS_POL) so PVHS can be either active- PVHS high or active-low.
Page 74
Pinout Information Pin Descriptions Table 2-1 Video Port Pin Descriptions (continued) Name Pin(s) Type Function Video port red data input. These pins have different functions depending on the settings of the PVmode register. [Input, pull-down, 5V-tolerant] PV_mode VR[7:0] Pin Function Reserved.
Page 75
Pin Descriptions Pinout Information Table 2-2 Digital/Graphics (DG) Port Pin Descriptions (continued) Name Pin(s) Type Function Digital/Graphics (DG) port red data. [Bi-directional, input with pull-down, tri-state 4mA DGR0 drive output, 5V-tolerant] DGR1 DGR[7:0] Pin Function DGR2 Digital/Graphics (DG) Port input (single pixel mode). DGR3 R[7:0]: red pixel data or DGR4...
Page 76
Pinout Information Pin Descriptions Table 2-3 System Power Pin Descriptions (continued) Name Pin(s) Type Function 14, 29, 42, 54, 64, 69, 80, 90, 101, 109, 120, 131, Digital I/O power (3.3V). PVDD 143, 165, 180, 200, 208, 216, 224, 230, 237, 243, 249, 256 10, 24,...
Pin Descriptions Pinout Information 2.2.4 Miscellaneous Pins Table 2-4 provides detailed descriptions for Miscellaneous Pins. Table 2-4 Miscellaneous Pin Descriptions Name Pin(s) Type Function Crystal oscillator input. Connect to an external 10MHz crystal. XTALI Crystal oscillator output. Connect to an external 10MHz crystal. XTALO Hardware asynchronous reset.
Page 78
Pinout Information Pin Descriptions Table 2-6 Memory Pin Descriptions (continued) Name Pin(s) Type Function SDRAM row address strobe. This signal is active low. [Tri-state output, 8mA drive, MRAS 5V-tolerant] SDRAM column address strobe. This signal is active low. [Tri-state output, 8mA drive, MCAS 5V-tolerant] SDRAM write enable.
Page 79
Pin Descriptions Pinout Information Table 2-7 Digital Display Output Port Pin Descriptions (continued) Name Pin(s) Type Function Display pixel enable red. [Tri-state output, 4mA drive, 5V-tolerant] DENR Digital display pixel enable green. [Tri-state output, 4mA drive, 5V-tolerant] DENG Digital display pixel enable blue. [Tri-state output, 4mA drive, 5V-tolerant] DENB Digital display output port output enable.
Page 80
Pinout Information Pin Descriptions Table 2-8 Analog Display Port Pin Descriptions (continued) Name Pin(s) Type Function Full-Scale adjust resistor. A resistor should be connected between this pin and AVS33 to control the magnitude of the full-scale video signal. RSET RSET(ohm)=VREFIN(V)*10.66/IOFS(A), where IOFS is full-scale output current.
Page 82
PIN DESCRIPTIONS Pin Name Pin Type Function Pin Number(s) Analog Input Red analog input Analog Input Green analog input Analog Input Blue analog input Analog Input Sync on Green analog input CLAMP Digital CMOS Input External Clamp Input HSYNC Digital CMOS Input Horizontal SYNC Input VSYNC Digital CMOS Input...
PIN CONFIGURATION DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 54pin TSOP II 400mil x 875mil 0.8mm pin pitch LDQM UDQM /CAS /RAS A10/AP PIN DESCRIPTION PIN NAME DESCRIPTION The system clock input. All other inputs are registered to the SDRAM on the Clock rising edge of CLK Controls internal clock signal and when deactivated, the SDRAM will be one...
CONNECTION DIAGRAMS This device is also available in Known Good Die (KGD) form. Refer to publication number 21536 for more information. BYTE# DQ15/A-1 DQ14 DQ13 DQ12 RESET# Standard TSOP DQ11 RY/BY# DQ10 BYTE# DQ15/A-1 DQ14 DQ13 DQ12 RESET# DQ11 Reverse TSOP DQ10 RY/BY# 21490G-2...
Page 85
CONNECTION DIAGRAMS This device is also available in Known Good Die (KGD) form. Refer to publication number 21536 for more information. RY/BY# RESET# BYTE# DQ15/A-1 DQ14 DQ13 DQ10 DQ12 DQ11 FBGA Top View, Balls Facing Down BYTE# DQ15/A-1 DQ14 DQ13 RESET# DQ12 RY/BY#...
Page 86
Special Handling Instructions for FBGA Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. Package T h e p a c k a g e a n d / o r d a t a i n t e g r i t y m a y b e Special handling is required for Flash Memory products compromised if the package body is exposed to in FBGA packages.
Page 87
PIN DESCRIPTION Table 1. Z86229 Pin Identification* 0 Q 5 [ O D Q N ( W P E V K Q P & K T G E V K Q P C SEL + P R W V GREEN % 5 ' .
PIN DEFINITIONS When the SMS and SEN pins are both in Inputs Reset Operation. the Low (0) state, the part is in the Reset state; therefore, in the I C mode, the SEN pin can be used as an NReset input. This pin selects 28h for writing and 29h for C SEL (Pin 1).
2 + 0 & ' ( + 0 + 6 + 1 0 5 % Q P V K P W G F Reference setting resistor. Resistor must be Power Supply RREF (Pin 10). 10 kOhms, ±2%. These pins are the lowest potential power (Pins 11).
General Description signals are present at the other inputs and the state of the storage elements. The MM74HC374 high speed Octal D-Type Flip-Flops uti- The 74HC logic family is speed, function, and pinout com- lize advanced silicon-gate CMOS technology. They pos- patible with the standard 74LS logic family.
Pin Name Pin # Type Description Input Clock Triggering Edge Select. H: Rising edge, L: Falling edge Power Supply Pins for TTL inputs and digital 8, 21 Power circuitry. CLKIN Clock in. 5, 11, 17, 24, 46 Ground Ground Pins for TTL inputs and digital circuitry. LVDS VCC Power Power Supply Pins for LVDS Outputs.