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Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.9.2
Diagram B3C, T6TU5EF (IC7720)
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Interface between Eagle and External SDRAM
RASN
CASN
SDCLKOUT
SDCLKIN
WEN
DQM
Eagle-1c
DQ(15:0)
A(11:0)
Internal Clock generation
CLKSEL
IS0
η
sel
0
CLKI
MUX
1
CLK32O
VSS
UVF0
UVF1
UVF2
UVF3
UVF4
UVF5
UVF6
UVF7
VDDC
VSS2
YF0
YF1
YF2
YF3
YF4
YF5
YF6
YF7
VSS2
VDDC
VDDS
SNRSTO
SNCL
SNRST
HD
VD
VSS
VDD
VDD2
INTR
VA
SNDA
VSS2
HREF
TRST
TMS
TDI
TDO
TCK
TESTSEL0
TESTSEL1
VSS2
VDDC
TESTSEL2
FALREF
REFIN
RESET
BISTEN
PLLND2
VDDS
VSS
RAS
RAS
CAS
CAS
CLK
CLK
CLK
WE
WE
DQM
UDQM
LDQM
Vss
CS
Vdd
CKE
MSM56V16160F-6
DQ(15:0)
DQ(15:0)
A(11:0)
A(11:0)
IS1
PLL
power down
VCO
@256MHZ
sel
1
÷2
÷2
MUX
÷2
0
SDCLKOUT
CLK64O
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Eagle 1C
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Figure 9-3 Internal Block Diagrams
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EM5.3A P/M AA
EAGLE IC digital output
interface to LVDS device
TXN0
Y0
TXN1
Y1
Eagle 1c
TXN2
Y2
TXN3
Y3
TXN4
Y4
TXN5
Y5
TXN6
Y6
TXN7
Y7
TXN8
Y8
TXN9
Y9
TXN10
UV0
TXN11
UV1
TXN12
UV2
TXN13
UV3
TXN14
UV4
TXN15
UV5
TXN16
UV6
TXN17
UV7
TXN18
UV8
TXN19
UV9
TXN20
VDE
TXN21
HDE
TXN22
OUTP_VAL
TXN23
TXN24
TXN25
TXN26
TXN27
CLK64O
9.
EN 107
LVDS Int erface IC
PLL
156
VSS2
155
AVSPLL
154
NC
153
NC
152
AVDPLL
151
VDDC
150
VSS2
149
VDDS
148
VSS
147
CLK32O
146
DQM
145
VSS
144
VSS2
143
VDDC
142
WEN
141
CASN
140
RASN
139
VDDS
138
ADDR11
137
ADDR10
136
ADDR0
135
VSS
134
ADDR1
133
ADDR2
132
ADDR3
131
VDDC
130
VSS2
129
SDCLKOUT
128
SDCLKIN
127
ADDR9
126
ADDR8
125
VDDS
124
VSS
123
VSS2
122
ADDR7
121
ADDR6
120
ADDR5
119
ADDR4
118
CLK64O
117
VSS
116
Y0
115
Y1
114
VSS2
113
VDDC
112
VDD2
111
VDD
110
Y2
109
Y3
108
VSS2
107
VSS
106
Y4
105
Y5
E_14600_058.eps
131004
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