Av-S70 Schematic Diagram - Yamaha AV-S70 Service Manual

A B

AV-S70 SCHEMATIC DIAGRAM (1/4)

1 Q Q
3 7 6 3 1 5 1 5 0
MAIN L
INPUT SELECTOR
2
8.7 8.7
8.7
0 0
AUX
0
0
8.7
0
0
0
0
0
3
0
0
0
0
TV
0
–7.9
0
0
4
VIDEO
0
0
–7.9
P-39
MUTING
K-3
T E 0
L 0 1 3 9 4 2 2 9 6 5 1 3
8.8
0.7
0 0
THROUGH
0 0.7
OUT 8.7
5 0
Z
Z
6
0.6
0
22.7
Z
Z
29.6
Z
Z Z
14.7 9.5
29.8
0 9.5
23.2
19.2
9.5
23.4
0
7
0 0 0
-23.3
–23.8
–23.1
–18.4 –29.6
Z 0
Z
Z Z
–15 –29.5 –22.7
Z
w w w
PIN CONNECTION DIAGRAM OF TRANSISTORS, DIODES AND ICS.
8
1SS133 MTZJ5.6B RBV-406 2SC1740S (Q, R, S) 2SC2878 (A, B)
.
1SR139-400 MTZJ9.1B RBV-606 2SC4208A (Q, R, S)
MTZJ10C DTA114ESA
DTC114ESA
DTC144ESA
Anode
B
–
Cathode C
E
+
C D E
P-37
J-4
0
0
–0.1
0 0
0
DSP SW
0
14.5
0
0
0
–8.7 0
–14.8
–0.1
0
0
28.5 –0.1
Z
28.7
P-39
J-6
CA401
AC43.9
0
0
26.5
4.8
10.3
0
0.7
9.9
4.8
Z
10.3
4.8 4.8
9.6
P-39
0
J-6
CA403
AC9.5
8.9
Z
Z
0
0
0
0
–29.6 P-39
J-6
CA402
AC46.8
Z
x a o
y
2SB1237 (Q, R) 2SK105 (T) NJM79M15FA NJM78M05FA
i
2SB1565 (E, F) NJM78M15FA
2SD2396 (J, K)
1:COMMON
1: OUTPUT
E
2:INPUT
C S 2: COMMON
G 3:OUTPUT 3 2
B B
D 3: INPUT 3 2
C 1
1
E
http://www.xiaoyu163.com F G
8
REAR L
22.5
0
0
–22.4
0
DIGITAL VOLUME
0
0
0
0
0
0
–22.3
0
0.1
0
23.0
Q Q
3 7 6 3
LFE (SW)
u 1 6 3
M5220FP TC4052BF TC9482N LC78212
.
µPC4570G2
9 14
5
8
16
8
4
28 30
1
1
1
1
http://www.xiaoyu163.com
H I
2 4
9 9
MUSIC SENSOR
MAIN L
P-39
A-4
SW
1 5 1 5 0 8 9 2
P-38
A-5
m
c o
15
J K
AV-S70/NX-SW70
IC101 : TC4052BF
Analog Multiplexers/Demultiplexers
2
8 9 9
INHIBIT VDD
6 16
A LEVEL BINARY TO 1-OF-4
10
B CONVERTER DECODER WITH INHIBIT
9
VSS
8
VEE
7
X0
12 SW
X1 14 SW
13 X
X2 15 SW
X3 SW
11
Y0 1 SW
Y1
5 SW
Y
3
Y2 2 SW
Y3 4 SW
INHIBIT B A
0 0 0 0x, 0y
0 0 1 1x, 1y
0 1 0 2x, 2y
0 1 1 3x, 3y
1 X X NONE
IC103 : LC78212
Analog Function Switch
L1 1 30 R1
L2 2 29 R2
L3 3 28 R3
LCOM1 4 27 RCOM1
L4 5 26 RCOM1
L5 6 25 R5
L6 3 7 24 R6
LCOM2 8 23 RCOM2
L7 9 22 R7
L8 10 21 R8
LCOM3 11 20 RCOM3
V DD 19 LEVEL SHIFTER
P-39 V SS 16
14 D1
LATCH
V 12
EE
E-6
15 CL
RES 18
SHIFT REGISTER
S 17 13 CE
IC106 : TC9482N
Digital Volume
2 1 28 27
L–OUT A
3
R–OUT A
26
L–IN A 4
1dB VR
LATCH R–IN A
25
4 9 8 2 9 8dB VR 9
24 R–A–GND A
LATCH
L–A–GND A 5
L–OUT B 23 R–OUT B
6
L–IN B 7
1dB VR 3 TO 7 22 R–IN B
LATCH DECODER
R–A–GND B
21
8dB VR 4 TO 13
LATCH DECODER
L–A–GND B 8 R–OUT C
20
L–OUT C
9
19 R–IN C
L–IN C
10
1dB VR
LATCH 18 R–A–GND C
8dB VR
LATCH
L–A–GND C 11
SHIFT REGISTER STROBE
CS1 12
(32BIT) GENERATOR
GND 13 LEVEL SHIFT 17 CS2
CK
14 16 STB
15 DATA
µ
IC102, 107 : PC4570G2
IC104, 105 : M5220FP
Dual OP-Amp
OUT 1 8 +V
1 CC
–IN 2 OUT
1 7 2
+ – + –
+IN 1 3 6 –IN 2
–V CC 4 5 +IN
2
* All voltage are measured with a 10MΩ/V DC electric volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
36