JVC KD-SX985 Service Manual page 35

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BR24C01AFV-W-X (IC502) : EEPROM
1.Pin layout
Vcc
A0
2.Block diagram
A0 1
A1 2
A2 3
TE
L 13942296513
GND 4
HIGH VOLTAGE GEN.
3.Pin function
Pin name
Vcc
GND
A0,A1,A2
SCL
SDA
WP
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*1 An open drain output requires a pull-up resister.
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WP SCL SDA
A1 A2 GND
1kbit EEPROM ARRAY
7bit
SLAVE/WORD
ADDRESS
7bit
ADDRESS REGISTER
DECODER
START
STOP
CONTROL LOGIC
Vcc LEVEL DETECT
I/O
-
Power supply
-
Ground (0v)
IN
Slave address set
IN
Serial clock input
Slave and word address,
IN / OUT
serial data input, serial data output *1
IN
Write protect input
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2 9
8
8bit
DATA
REGISTER
Q Q
3 6 7 1 3 1 5
ACK
Function
co
.
9 4 2 8
8 Vcc
7 WP
6 SCL
0 5 8 2 9 9 4 2 8
5 SDA
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KD-SX985
9 9
9 9
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