Yamaha ACU16-C Service Manual page 15

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AK4393-VF-E2 (XW029A00) DAC
PIN
NAME I/O
No.
1 DVSS -
2 DVDD -
3 MCLK I
4 PD I
5 BICK I
6 SDATA I
7 LRCK I
8 SMUTE I
CS I
9 DFS I
10 DEM0 I
CCLK I
11 DEM1 I
CDTI I
TE
L 13942296513
12 DIF0 I
13 DIF1 I
14 DIF2 I
YM3436DK (XG948E0) DIR2 (Digital Format Interface Receiver)
PIN
NAME I/O
NO.
1 DAUX I
2 HDLT O
3 DOUT O
4 VFL O
5 OPT O
6 SYNC O
7 MCC O
8 WC O
9 MCB O
10 MCA O
11 SKSY I
12 XI I
13 XO O
14 P256 O
15 LOCK O
16 Vss
17 TC O
18 DIM1 I
19 DIM0 I
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20 DOM1 I
21 DOM0 I
22 KM1 I
.
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FUNCTION
Digital Ground Pin
Digital Power Supply Pin, 3.3V or 5.0V
Master Clock Input Pin
Power-Down Mode Pin
When at "L",the Ak4393 is in power-down
mode and is held in reset.
The AK4393 should always be reset
upon power-up.
Audio Serial Data Clock Pin
The clock of 64fs or more than is
recommended to be input on this pin.
Audio Serial Data Input Pin
2's complement MSB-first data is input on this pin.
L/R Clock Pin
Soft Mute Pin
When this pin goes "H", soft mute cycle is initiated.
When returning "L",the output mute releases.
Chip Select Pin in serial mode
Doubla speed sampling mode Pin
(Internal pull-down pin)
"L":Normal Speed, "H":Double Speed
De-emphasis Enable pin
Control Data Clock Pin in serial mode
De-emphasis Enable pin
Control Data Input Pin in serial mode
Digital Input Format Pin
FUNCTION
Auxiliary input for audio data
Asynchronous buffer operation flag
Audio data output
Parity flag output
Fs x 1 Synchronous output signal for DAC
Fs x 1 Synchronous output signal for DSP
Fs x 64 Bit clock output
Fs x 1 Word clock output
Fs x 128 Bit clock output
Fs x 256 Bit clock output
Clock synchronization control input
Crystal oscillator connection or external
clock input
Crystal oscillator connection
VCO oscillating clock connection
PLL lock flag
Logic section power (GND)
PLL time constant switching output
Data input mode selection
Data input mode selection
Data output mode selection
Data output mode selection
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Clock mode switching input 1
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8
DAC: IC203, 204, 303, 304, 403, 404, 503, 504
PIN
NAME I/O
No.
15 BVSS I
16 VREFL I
17 VREFH -
18 AVDD -
19 AVSS O
20 AOUTR- O
21 AOUTR+ O
22 AOUTL- O
23 AOUTL+ O
24 VCOM O
25 P/S I
Q Q
3 6 7 1 3 1 5
26 CKS0 I
27 CKS1 I
28 CKS2 I
PIN
NAME I/O
NO.
23 RSTN I
24 Vdda
25 CTLN I
26 PCO O
27 (NC)
28 CTLP I
29 Vssa
30 TSTN I
31 KM2 I
32 KM0 I
33 FS1 O
34 FS0 O
35 CSM I
36 EXTW I
37 DDIN I
38 LR O
39 Vdd
40 ERR O
41 EMP O
42 CD0 O
43 CCK I
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44 CLD I
.
9 4 2 8
FUNCTION
Substrate Ground Pin, 0V
Low Level Voltage Reference Input Pin
High Level Voltage Reference Input Pin
Analog Power Supply Pin,5V
Analog Ground Pin, 0V
Rch Negative analog output Pin
Rch Positive analog output Pin
Lch Negative analog output Pin
Lch Positive analog output Pin
Common Voltage Output Pin,2.6V
Parallel/Serial Select Pin(Internal pull-up pin)
"L":Serial control mode,"H": Parallel control mode
0 5 8 2 9 9 4 2 8
Master Clock Select Pin
MAIN: IC502
FUNCTION
System reset input
VCO section power (+5V)
VCO control input N
PLL phase comparison output
VCO control input P
VCO section power (GND)
Test terminal. Open for normal use
Clock mode switching input 2
Clock mode switching input 0
Channel status sampling frequency
display output 1
Channel status sampling frequency
display output 0
Channel status output method selection
External synchronous auxiliary input
word clock
EIAJ (AES/EBU) data input
PLL word clock output
Logic section power (+5 V)
Data error flag output
Channel status emphasis control code
output
m
3-wire type microcomputer interface data
output
3-wire type microcomputer interface clock
input
3-wire type microcomputer interface load
input
ACU16-C
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