Lsi Pin Function - Casio SF-5580E Service Manual

7. LSI PIN FUNCTION

CPU (LC868016A): U1
Pin No. Name
1 VDD
2~65 S1~48,C1~16
66 V1
67 V2
68 V3
69 V4
70 V5
71 VLCD
78 VSS
80 P41
82 P43
84 P46
85 P47
87 P71
90 P10
91 P11
93 P13
96 P16
98 P57
99 P56
101 P54
102 P53
104 P51
105 P50
106 VDD1
107 P30
108 P31
109 P32
110 P33
111 P34
112 P35
113 P36
114 P37
115 P00
116 P01
117 P02
118 P03
119 P04
120 P05
121 P06
122 P07
123 P20
124 P21
125 P22
126 P23
127 P24
128 P25
129 P26
130 P27
131 ADLC
132 -EROE
133 -RST
134 XT1
135 XT2
136 VSS
137 CF1
138 CF2
I / O
I Power supply for this CPU
O Common signals to LCD
O
O
O Bias power supply to LCD
O
O
O Power supply to LCD
— Ground for this CPU
O Clock for LCD driver LSI(U2, U3:LC868900)
O Signal to LCD driver LSI(U2, U3:LC868900)(AC voltage is supplied to LCD by this
signal.)
O Read signal to RAM(U42, U62) and LCD driver LSI(U2, U3:LC868900)
O Write signal to RAM(U42, U62) and LCD driver LSI(U2, U3:LC868900)
I Detection of low battery voltage(=2.5V) from IC(U2:S80725)
O Serial data output to another unit or a personal computer
I Serial data input from another unit or a personal computer
O Control signal to power supply IC(DC/AC inverter IC) for EL (H: EL-OFF/L: EL-ON)
O Control signal for buzzer(H: buzzer-ON/L: buzzer-OFF)
O Chip select to LCD driver LSI(U3:LC868900)
O Chip select to LCD driver LSI(U2:LC868900)
O Clock to IC(U8:74HC273) for the keyboard data latch
O Control signal to LCD driver LSI(U2, U3:LC868900)
O Address bus to RAM(U42, U62)
O Address bus to ROM(U5)
O Power supply for this CPU
I
I
I
I Signals for key assign from keyboard
I
I
I
I
I/O
I/O
I/O
I/O Address bus to the address data latch IC(U7:74HC373)
I/O
I/O
I/O
I/O
O
O
O
O Address bus to ROM(U5) and RAM(U42, U62)
O
O
O
O
O Control signal to the address data latch IC(U7:74HC373)
O Chip select to ROM(U5)
I Reset signal for this CPU and LCD driver LSI(U2, U3:LC868900)
I Timer clock for this CPU
O
— Ground for this CPU
I Main clock for this CPU
O
— 23 —
Function