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• IC401 M30622MGP-A54FPU0 SYSTEM CONTROL (MAIN BOARD)
Pin No.
Pin Name
1
2
CD-DATA-OUT
3
4
5
MP3-DATA-OUT
6
MP3-DATA-IN
7
MP3-CLK
8
9
10
11
XC-OUT
12
13
14
15
16
17
18
19
20
AC-CUT
TE
21
L 13942296513
22
MP3-RST
23
24
25
MP3-ACK
26
MP3-REQ
27
MP3-STB
28
29
30
IIC-DATA
31
32
CDG-DET
33
CDG-RST
34
CD-MUTE
35
CD-POWER
36
37
ST-DOUT/MC-DIN
38
39
ST-DIN/MC-DOUT
40
41
OPEN-SW
42
TBL-SENSE
www
43
44
45
.
46
47
http://www.xiaoyu163.com
I/O
BD-RST
O
Reset signal output to the digital signal processor ( "L":reset)
O
Serial data output to the digital signal processor
XLAT
O
Serial data latch pulse output to the digital signal processor
SIRCS
I
Remote control signal input
O
Serial data output signal to MP3 decoder IC
I
Serial data input signal from MP3 decoder IC
O
Serial data transfer clock signal to MP3 decoder IC
BYTE
-
Ground terminal
CNVSS
-
Ground terminal
XC-IN
I
Sub system clock input terminal (32.768kHz)
O
Sub system clock output terminal (32.768kHz)
RESET
I
System reset signal input from the reset signal IC ("L": reset) After the power supply
rises, "L" is input for several hundreds msec and then change to "H".
X-OUT
O
Main system clock output terminal (5MHz)
VSS
-
Ground terminal
X-IN
I
Main system clock input terminal (5MHz)
VCC
-
Power supply terminal (+3.3V)
NMI
I
Non-maskable interrupt input terminal (Pull to +3.3V)
NO-USE
I
Unused port (Pull to ground)
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
I
"C off detection signal input from the reset signal IC ("L": AC cut detected)
SENS
I
Internal status detection monitor input from the digital signal processor
O
Reset signal output to MP3 decoder IC
MP3-CS
O
Chip select output signal to MP3 decoder IC ("L":enable)
MP3-LP
O
Latch output signal to MP3 decoder IC ("L":enable)
I
Acknowledgement input signal from MP3 decoder IC ("L":acknowledged)
I
Request signal from MP3 decoder IC
O
Standby mode signal output to MP3 decoder IC ("L":standby mode)
XTACN
O
BD DSP oscillation on/off control signal output ("H":on)
IIC-CLK
I/O
Clock signal for IIC communcation between the microcomputer and the IIC checker
I/O
Data signal for IIC communcation between the microcomputer and the IIC checker
VMUTE
O
CDG video signal muting on/off control signal output ("H": muting on)
I
CDG disc detection signal input from CDG decoder ("H": CDG disc detected)
O
Reset signal output to the CDG decoder ("L":reset)
O
CD analog signal muting on/off control signal output ("H":muting on)
O
Power on/off control signal output to BU section ("H":power on)
ST-CE
O
PLL chip enable signal output to the tuner unit
I
PLL serial data input from the tuner unit
ST-CLK
O
PLL serial data transfer clock signal output to the tuner unit
O
PLL serial data output to the tuner unit
TUNED
I
Tuning detection signal input from the tuner unit ("L":tuned)
I
Eject detection signal input from the CD mechanism deck
I
Disc tray position detection signal input from the CD mechanism deck
E-3
I
Disc tray status detection signal input from the CD mechanism deck
x
ao
E-2
I
Disc tray status detection signal input from the CD mechanism deck
y
E-1
I
Disc tray status detection signal input from the CD mechanism deck
i
TM-F
O
Turning motor control signal output to the CD mechanism deck
TM-R
O
Turning motor control signal output to the CD mechanism deck
http://www.xiaoyu163.com
8
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HCD-GNX660
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Description
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Ver. 1.1
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2 8
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