Akai LCT3201ad Service Manual page 59

5.4 LVDS INTERFACE
8bit LSB: R0, G0, B0
JEIDA: Parallel TTL Data Inputs Mapped to LVDS outputs
TRANSMITTER(THC63LVD823)
PIN NO INPUT DATA
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
27
28
30
50
2
8
10
16
18
25
INTERFACE
CONNECTOR
HOST
TA0
TA1
TA2
TxOUT0+
TA3
TxOUT0-
TA4
TA5
TA6
TB0
TB1
TB2
TxOUT1+
TB3
TxOUT1-
TB4
TB5
TB6
TC0
TC1
TC2
TxOUT2+
TC3
TxOUT2-
TC4
TC5
TC6
TD0
TD1
TD2
TxOUT3+
TD3
TxOUT3-
TD4
TD5
TD6
TIMING CONTROLLER INPUT
TFT_LCD
TA+
TA-
TB+
TB-
TC+
TC-
TD+
TD-
58
R2
R3
R4
R5
R6
R7 (MSB)
G2
G3
G4
G5
G6
G7 (MSB)
B2
B3
B4
B5
B6
B7 (MSB)
Hsync
Vsync
DENA
R0 (LSB)
R1
G0 (LSB)
G1
B0 (LSB)
B1
Reserved