Akai LCT3201ad Service Manual page 28

5
GPIO0
GPIO0 3
GPIO2
GPIO2 1,3
CLK1+
CLK1+ 3
CLK1-
CLK1- 3
AP[0..7] 3
AP[0..7]
AN[0..6] 3
AN[0..6]
LVDS_GND
LVDS_GND 2,3,4
LVDSVDD
LVDSGND 2,3,4
CCIR_VCLK
CCIR_VCLK 3
CCIR_V4
CCIR_V4 3
FCLK
FCLK 3
FCMD
FCMD 3
FDAT
FDAT 3
SCL_8202
SCL_8202 3,6,9
SDA_8202
SDA_8202 3,6,9
D
RELAY_ON
RELAY_ON 1
VS_ON
VS_ON 1
12V
12V 1,13
12V
C
B
SCL_8202
SDA_8202
5VSB
R98 R98 R99 R99 R110 R110 R112 R112
10K/NC 10K/NC 10K/NC 10K/NC 10K 10K 10K 10K
A
CCIR_VCLK
CCIR_V4
5
4
VCC
L68 L68 FB/NC FB/NC
L56 L56 FB/NC FB/NC
L57 L57 FB/NC FB/NC
L69 L69 FB/NC FB/NC
CE95 CE95 + + CE107 CE107
220uF/16v/NC 220uF/16v/NC 220uF/16v/NC 220uF/16v/NC
+ +
LVDS_GND
LO = > LVDS POWER OFF
HI = > LVDS POWER ON
SB33B
GPIO2
SB33B
R106 R106 R107 R107
4.7k 4.7k 4.7k 4.7k
R100 R100
0/NC 0/NC
R7 R7 0 0 SCL_P
R102 R102
SB33B
0/NC 0/NC
R105 R105 0 0 SDA_P
R108 R108 0 0
R109 R109 0 0
FHP USE
4
3
5VSB
SB33B
R17 R17 R18 R18 R19 R19 CPUGO /PDPGO :INPUT TO PDP
10K/NC 10K/NC 10K/NC 10K/NC 10K/NC 10K/NC R23 R23 R24 R24 R25 R25 IRQ /READY :PDP INPUT TO MT8202
10K 10K 10K 10K 10K 10K
AN6 R26 R26 0/NC 0/NC
ADD1
R27 R27 0/NC 0/NC
AP6 R28 R28 0/NC 0/NC
ADD2 R29 R29 0/NC 0/NC
AP7 R30 R30 0/NC 0/NC
FDAT R31 R31 0/NC 0/NC
R93 R93
SB33B
4.7k/NC 4.7k/NC
10k 10k
R32 R32 R33 R33
4.7k 4.7k Q39 Q39
GPIO0
SOT23/SMD SOT23/SMD
2N3904 2N3904
LVDSVDD
CE94 CE94
+ +
330uF/25v 330uF/25v
U35 U35
C330UF25V/D8H14 C330UF25V/D8H14
8 1
D1 S1
7 2
D1 G1
6 3
D2 S2
5 4
D2 G2
IRF7316 IRF7316
SOIC8/SMD SOIC8/SMD
VCC 12V
R294 R294 R425 R425 R53 R53 R54 R54
22k/NC 22k/NC 22k/NC 22k/NC 22K/NC 22K/NC 22K/NC 22K/NC
Gate2
Gate1
R656 R656
10K 10K
R296 R296
Q16 Q16
1
2N3904 2N3904
1k/NC 1k/NC SOT23/SMD/NC SOT23/SMD/NC
LVDS_GND
SB33B 5VSB
R287 R287
4.7k/NC 4.7k/NC R257 R257
1k/NC 1k/NC
RELAY_ON R60 R60 ADD1
0/NC 0/NC R250 R250
Q12 Q12
1
2N3904/NC 2N3904/NC
1k/NC 1k/NC
USE WHEN LG V6
SB33B 5VSB
R224 R224
4.7k/NC 4.7k/NC R260 R260
1k 1k
VS_ON 0 0 R104 R104 ADD2
Q13 Q13 R248 R248 1k 1k
1
2N3904 2N3904
USE WHEN LG V6
27
3
2
LVDS OUT(Include PDP and 32' LCD LVDS interface)
AN0
AP0
AN1
CPUGO AP1
AN2
PDPGO AP2
CLK1-
SEL_AP7_IRQ CLK1+
AN3
5VSB SB33B AP3
AN4
R94 R94 AP4
4.7k 4.7k
AN5
AP5
1
DISPEN_PDWN_READY R90 R90 0 0
F1 F1 SCL_P R91 R91 100 100
SDA_P R92 R92 100 100
4A/16V/NC 4A/16V/NC
+ + CE96 CE96 CB181 CB181
220uF/16v/NC 220uF/16v/NC 0.1uF/NC 0.1uF/NC
LVDS_GND
FCLK
R288 R288
10k/NC 10k/NC
FCMD
R289 R289
10k/NC 10k/NC
2
1
J10 J10
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
FI-SE30P-HF FI-SE30P-HF
LVDS/30P/P1.25/S LVDS/30P/P1.25/S
C
B
A
KAWA Confidential KAWA Confidential KAWA Confidential
Title Title Title
LVDS OUT LVDS OUT LVDS OUT
Rev Rev Rev
Size Size Size Document Number Document Number Document Number <Designer> <Designer> <Designer>
AKAI_MT8202_27US_LVDS_V0.0 AKAI_MT8202_27US_LVDS_V0.0 AKAI_MT8202_27US_LVDS_V0.0 1 1 1
C C C
Checked: Checked: Checked: <Checker> <Checker> <Checker>
Date: Date: Date: Thursday, April 13, 2006 Thursday, April 13, 2006 Thursday, April 13, 2006 Sheet Sheet Sheet 12 12 12 17 17 17
1