Sharp CD-PC1881V Service Manual page 46

CD-PC1881V
IC2 VHiLC78631E-1: Servo/Signal Control (LC78631E) (1/2)
Pin
Terminal Name Input/Output
No.
1* VPDO
2 PD02
3 PDO1
4 AVSS
5 FR
6 AVDD
7 ISET
8 TAI
9 EFMO
10 VSS
11 EFMI
12 TEST1
13,14 CLV+, CLV-
15 V/P
16,17 TEST2, TEST3
18* P4 Input/Output
19 HFL
20 TES
21* PCK
22* FSEQ
23 TOFF
24 TGL
25* THLD
26 TEST4
27 VDD
28,29 JP+, JP-
30*,31* SLD+, SLD-
32 EMPH_B
33* P5 Input/Output
34* LRCKO
35* DFLRO
36* DACKO
37* CONT1
38 P0/DFCK Input/Output
39 P1/DFIN Input/Output
40 P2 Input/Output
41 P3/DFLR Input/Output
42 LRSY
43 CK2
44 ROMXA
45 C2F
46 MUTEL
47 LVDD
48 LCHP
49 LCHN
50 LVSS
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Note: The same potential must be to the power terminals (VDD, VVDD, LVDD, RVDD, XVDD).
Unused input ports of general-purpose input/output ports (I/O) must be connected to 0V or set output port.
Output Variable pitch PLL charge pump output.
Output Double-speed and mode playback PLL charge pump output.
Output Normal-speed mode playback PLL charge pump output.
— Analog system ground. Normally 0V.
— Built-in VCO frequency range setting resistor connection.
— Analog system power supply.
— PDO1 and PDO2 output current setting resistor connection.
Input Test input. A pull-down resistor is built in.
Output EFM signal output.
— Digital system ground. Normally 0V.
Input EFM signal input.
Input Test input. A pull-down resistor is built in.
Output Spindle servo control output. CLV+ outputs a high level for acceleration, and CLV-outputs a high
level for deceleration.
Output Rough servo/phase control automatic switching monitor output. A high-level output indicates
rough servo, and a low-level output indicates phase control.
Input Test input. A pull-down resistor in built in.
I/O port.
Input Track detection signal input. This is a Schmitt input.
Input Tracking error signal input. This is a Schmitt input.
Output EFM data playback bit clock monitor. Outputs 4.3218 MHz when the phasw is locked.
Output Synchronization signal detection output. Output a high level when the synchronization signal
detected from EFM signal matches the internally generated synchronization signal.
Output Tracking off output.
Output Tracking gain switching output. Increase the gain when this pin outputs a low level.
Output Tracking hold output.
Input Test input. A pull-down resistor is built in.
— Digital system power supply.
Output Track jump output. JP+ outputs a high level both for acceleration during outward direction jumps
and for deceleration during inward direction jumps. JP- outputs a high level both for acceleration
during inward direction jumps and for deceleration during outward direction jumps.
Output Slide output. This pin can be set to 1 of 4 levels by commands sent from the system control
microprocessor.
Output De-emphasis monitor. A high level indicates that disc requlring de-emphasis is being played.
I/O port.
Output
Output Digital filter outputs
Output
Output Output port.
I/O port or digital filter bit clock input.
I/O port or digital filter data input.
I/O port. Used as the de-emphasis filter on/off switching pin in anti shock mode.
Port output or digital fllter LR clock input.
Output
Output
Output ROMXA pins
Output
Output
—
One-bit D/A
Output
converter pins
Output
—
Function
LR clock output.
LR data output. The digital filters can be turned off with the DFOFF command.
Bit clock output.
LR clock output.
Bit clock output. The polarity can be inverted with the CK2CON command.
Interpolated data output. Data that has been interporated can be output by
issuing the ROMXA command.
C2 flag output.
Left channel mute output.
Left channel power supply.
Left channel P output.
Left channel N output.
Left channel ground. Normally 0V.
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