Delayed Transaction - MSI MICRO NLX BX4 User Manual

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CHAPTER 3

8 Bit I/O Recovery Time

The recovery time is the length of time, measured in CPU clocks,

which the system will delay after the completion of an input/output request.

This delay takes place because the CPU is operating so much faster than the

input/output bus that the CPU must be delayed to allow for the completion

of the I/O.

This items allows you to determine the recovery time allowed for 8 bit

I/O. Choices are from NA, 1 to 8 CPU clocks.

16 Bit I/O Recovery Time

This items allows you to determine the recovery time allowed for 16

bit I/O. Choices are from NA, 1 to 4 CPU clocks.

Memory Hole At 15M-16M

In order to improve performance, certain space in memory can be

reserved for ISA cards. This memory must be mapped into the memory

space below 16 MB.

Enabled

Disabled

Passive Release

When Enabled, CPU to PCI bus accesses are allowed during passive

release. Otherwise, the arbiter only accepts another PCI master access to

local DRAM. The settings are Enabled or Disabled.

Delayed Transaction

The chipset has an embedded 32-bit posted write buffer to support

delay transactions cycles. Select Enabled to support compliance with PCI

specification version 2.1. The settings are Enabled or Disabled.

AGP Aperture Size (MB)

Select the size the of the Accelerated Graphics Port (AGP) aperture.

The aperture is a portion of the PCI memory address range dedicated for

graphics memory address space. Host cycles that hit the aperture range are

forwarded to the AGP without any translation.

Memory hole supported.

Memory hole not supported.

3-15

AWARD

BIOS SETUP

AWARD

BIOS SETUP

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