Error Correction; Msvll-Jd, -Je Memory Modules - Digital Equipment MicroPDP-11 Technical Manual

MicroPDP-11 Base Systems
SWITCH (SP2) ADDRESS
CSR ADDRESS
~'1 ~
MEMORY
TEST W2 W1
~ ~
SWITCH (SP1)
CONNECTOR
f{It
~
W4 W3
D C
DATA
GATE
ARRAY
ADDRESS
GATE
ARRAY
B
Figure 2-7 MSVll-JD, -JE Memory Module
A
The MSVll-JD and MSVll-JE memories are quad-height Q22-Bus modules that
occupy the slot(s) immediately prior to the KDJll-BF CPU in the backplane assem-
bly. They are available in the factory configuration shown in Table 2-20.
Table 2-20 MSVII-JD, -JE Memory Modules*
Option
Number
MSVII-JD
MSVII-JE
Module
Designation
M8637-D
M8637-E
Description
1
MB ECC using 256 K dynamic RAMs
2 MB ECC using 256 K dynamic RAMs
*
MSVll-JB,
-JC
modules are used on MicroPDP-ll/84 Unibus systems only. They cannot
be used on Q22-Bus systems.
The memory starting address can be set in any 8 KW boundary within the 2048
KW extended address space. The extended address space contains 22 address lines.
2.10.1 Error Correction
The MSVll-JD, -JE contains ECC logic which detects and corrects single-bit errors
and detects double-bit errors. Detecting and correcting single-bit errors is transpar-
ent to the master device accessing the memory.
2-36