Sony HD-FLX9W Service Manual page 115

Dvd deck receiver
Table of Contents

Advertisement

QQ
3 7 63 1515 0
DSP BOARD IC601 CXD9720Q (AUDIO DIGITAL SIGNAL PROCESSOR)
Pin No.
Pin Name
VSS
1
XRST
2
EXTIN
3
LRCKI3
4
5
VDDI
BCKI3
6
PLOCK
7
8
VSS
MCLK1
9
10
VDDI
VSS
11
MCLK2
12
MS
13
14
SCKOUT
LRCKI1
15
16
VDDE
TE
L 13942296513
BCKI1
17
SDI1
18
LRCKO
19
BCKO
20
21
VSS
KFSIO
22
SDO1
23
SDO2
24
25
SDO3
SDO4
26
SPDIF
27
LRCKI2
28
BCKI2
29
SDI2
30
VSS
31
32
HACN
HDIN
33
HCLK
34
HDOUT
35
www
36
HCS
GP12
37
GP13
38
.
GP14
39
http://www.xiaoyu163.com
I/O
Ground terminal
I
Reset signal input from the digital audio interface receiver "L": reset
I
Master clock signal input terminal Not used
L/R sampling clock signal input from the A/D converter or digital audio interface receiver or
I
digital audio processor
Power supply terminal (+3.3V)
Bit clock signal (2.8224 MHz) input from the A/D converter or digital audio interface receiver or
I
digital audio processor
O
Internal PLL lock signal output terminal Not used
Ground terminal
I
System clock input terminal (13 MHz)
Power supply terminal (+3.3V)
Ground terminal
O
System clock output terminal (13 MHz)
I
Master/slave selection signal input terminal "L": slave, "H": master (fixed at "L" in this set)
O
Internal system clock signal output to the D/A converter
L/R sampling clock signal input from the A/D converter or digital audio interface receiver or
I
digital audio processor
Power supply terminal (+3.3V)
Bit clock signal (2.8224 MHz) input from the A/D converter or digital audio interface receiver or
I
digital audio processor
I
Audio serial data input from the digital audio interface receiver or digital audio processor
O
L/R sampling clock signal (44.1 kHz) output to the D/A converter and RF modulator
O
Bit clock signal (2.8224 MHz) output to the D/A converter and RF modulator
Ground terminal
I
Audio clock signal input from the A/D converter or digital audio interface receiver
O
Audio serial data output to the D/A converter
O
Audio serial data output to the D/A converter and RF modulator
O
Audio serial data output to the D/A converter
O
Audio serial data output to the D/A converter
O
S/PDIF signal output terminal Not used
L/R sampling clock signal input from the A/D converter or digital audio interface receiver or
I
digital audio processor
Bit clock signal (2.8224 MHz) input from the A/D converter or digital audio interface receiver or
I
digital audio processor
I
Audio serial data input from the A/D converter
Ground terminal
O
Acknowledge signal output to the system controller
I
Write data input from the system controller
I
Clock signal input from the system controller
O
Read data output to the system controller
I
Chip select signal input from the system controller
x
ao
u163
O
Clock signal output terminal Not used
y
O
Clock enable signal output terminal Not used
i
O
Row address strobe signal output terminal Not used
http://www.xiaoyu163.com
2 9
8
Description
Q Q
3
6 7
1 3
1 5
co
.
HCD-FLX9W
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
115

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents