Table 34. Methodology For Memory Protection And Clearing - Dell POWEREDGE R510 Technical Manualbook

Dell
Planar
System BIOS SPI
Flash
LOM Configuration
Data
iDRAC6 Controller
ROM
iDRAC6 controller
RAM
System CPLD
System CPLD
iDRAC6 Express
Internal Flash
System RAM
TPM ID EEPROM
(Plug in module only)
TPM Binding
EEPROM (on China
planar only)
iDRAC6 SDRAM
iDRAC6 FRU
iDRAC6 Boot Block
Flash
Trusted Platform
Module
Technical Guidebook's Title
Table 34.
How is this memory write
protected?
Software write protected
Not explicitly protected but
special applications are
needed to communicate
through the LOMs to
reprogram this ROM.
protected permanently by
hardware
n/a
Requires special system
specific utility
Not accessible
Writes are proxied through
a temporary iDRAC
scratchpad RAM and not
directly made from an OS
or OS application.
OS control
HW read only
Locked by BIOS from
physical access by anyone
after boot
n/a
writes controlled by iDRAC
embedded OS
iDRAC embedded OS
control of the write
protection.
SW write protected
Methodology for Memory Protection and Clearing
How is the memory cleared?
Not possible with any utilities or applications and system is not
functional if corrupted/removed.
Not user-clearable
Not clearable
iDRAC reset
Not possible with any utilities or applications and system is not
functional if corrupted/removed.
Not clearable
Not user-clearable
Reboot or power down system
Not - read only
N/A - BIOS control only
AC cycle for BMC OS and reset / power off server for VGA frame
buffer
EPPID is not clearable
Not possible with any utilities or applications and iDRAC does not
function as expected if corrupted/removed. Lifecycle log is
clearable only in a factory environment.
SEL is user-clearable
F2 Setup option
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