Memory Configuration - Asus P5G-TVM Manual

2.4.2 Memory Configuration
Advanced
DRAM Timing Selectable
X CAS Latency Time
X DRAM RAS# to CAS# Delay
X DRAM RAS# Precharge
X Precharge delay(tRAS)
X System Memory Frequency
F1:Help ↑↓ : Select Item
ESC: Exit →←: Select Menu
DRAM Timing Selectable [By SPD]
When the item is set to [By SPD], the DRAM timing parameters are
adjusted according to the DRAM SPD (Serial Presence Detect). If you
want to manually set the DRAM timing parameters, set the item to
[Manual]. Thus you can change the settings through the DRAM sub-items.
Configuration options: [Manual] [By SPD]
The following items become configurable only when you set DRAM
Timing Selectable item to [Manual]
CAS LatencyTime
Controls the latency between the SDRAM read command and the time
the data actually becomes available.
DRAM RAS# to CAS# Delay
Controls the latency between the DDR SDRAM active command and
the read/write command.
DRAM RAS# Precharge
Controls the idle clocks after issuing a precharge command to the DDR
SDRAM.
Precharge Delay
Sets the row-precharge delay timing.
System Memory Frequency
Controls the system memory frequency.
ASUS P5G-TVM
Phoenix-Award BIOS CMOS Setup Utility
Memory Configuration
[By SPD]
2.5
3
3
8
400MHz
-/+: Change Value
Enter: Select Sub-menu
Select Menu
Item Specific Help
Place an artificial memory
clock limit on
the system. Memory is
prevented from
running faster than this
frequency.
F5: Setup Defaults
F10: Save and Exit
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