Iom Hold Bit; Forced Status Hold Bit; Error Log Reset Bit; Output Off Bit - Omron CVM1D Operation Manual

Auxiliary Area

3-6-1 IOM Hold Bit

3-6-2 Forced Status Hold Bit

3-6-3 Error Log Reset Bit

3-6-4 Output OFF Bit

3-6-5 CPU Bus Unit Restart Bits

46
Word(s)
A502 00 to 07
08 to 15
A503 to A510 00 to 15
A511 00 to 04
05 to 14
15
Note 1. During duplex operation, the status of A008 through A015 will not agree in
the active and standby CPU Units.
2. For details about duplex initialization, refer to
3. Do not use A50013 (Always ON Flag), A50014 (Always OFF Flag), or
A50015 (First Cycle Flag) to control execution of differentiated instructions.
The instructions will never be executed.
Bit A00012 can be turned ON to preserve the status of the CIO Area, Transition
Flags, Timer Flags, Timer PVs, index registers, data registers, and the Current
EM Bank Number when shifting from PROGRAM or DEBUG to MONITOR or
RUN mode or when shifting from MONITOR or RUN mode to PROGRAM or DE-
BUG mode. (I/O Memory includes the CIO Area, TR Area, CPU Bus Link Area,
Auxiliary Area, Transition Flags, Step Flags, Timer Completion Flags, and
Counter Completion Flags.)
When the IOM Hold Bit is OFF, the CIO Area, Transition Flags, Timer Flags, Tim-
er PVs, index registers, data registers, and the Current EM Bank Number are
cleared when switching between these modes.
If the IOM Hold Bit is ON, and the status of the IOM Hold Bit itself is preserved in
the PC Setup (Setting B, IOM Hold Bit status), then I/O Memory is also pre-
served when the PC is turned ON or power is interrupted.
Bit A00013 can be turned ON to preserve the status of bits that have been force-
set or force-reset when switching modes (except RUN mode). When the Forced
Status Hold Bit is OFF, bits that have been force-set or force-reset will return to
default status when switching between modes.
If the Forced Status Hold Bit is ON, and the status of the Forced Status Hold Bit
itself is preserved in the PC Setup (Setting B, Forced Status Hold Bit status),
then the status of bits that have been force-set or force-reset is also preserved
when the PC is turned ON or power is interrupted.
In any case, bits that have been force-set or force-reset will return to default sta-
tus when switching to RUN mode.
Bit A00014 can be turned ON to clear the contents of the Error Log Area (words
A100 to A199), and reset the Error Record Pointer to 0. The Error Log Reset Bit
is automatically turned OFF after the Error Log Area is cleared.
Bit A00015 can be turned ON to turn OFF all outputs from the PC. The OUT INH.
indicator on the front panel of the CPU will light.
Bits A00100 through A00115 can be turned ON to reset CPU Bus Units number
#0 through #15, respectively. The Restart Bits are turned OFF automatically
when restarting is completed.
Bit(s)
Port #0 to #7 Enabled Flags
Port #0 to #7 Execute Error Flags
Port #0 to #7 Completion Codes
Current EM Bank (0 to 7)
Not used.
EM Installed Flag
Section 3-6
Function
6-2-2 Duplex Initialization.