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Table 3-11 Strap Definitions for the RX881
Strap Function
STRAP_DEBUG_BUS_GPIO
_ENABLE#
RESERVED
LOAD_EEPROM_STRAPS# SUS_STAT#
Note: On the RX881, the widths of the A-Link Express II interface and the general purpose PCIe links are configured through the
programmable strap GPPSB_LINK_CONFIG, which is programmed through RX881's registers. See the RS880 ASIC Family Register
Reference Guide, order# 46142, and the RS880 ASIC Family Register Programming Requirements, order# 46141, for details.
46136 AMD RX881 Databook 1.40
3-10
Strap Pin
Description
DAC_VSYNC
Enables debug bus access through memory I/O pads and GPIOs.
0: Enable
1: Disable
(See debug bus specification documents for more details.)
DAC_HSYNC
0: Reserved
1: Required setting. Select with a pull-up resistor on the strap.
Selects loading of strap values from EEPROM.
2
0: I
C master can load strap values from EEPROM if connected, or use default values if
EEPROM is not connected. Please refer to RX881's reference schematics for system
level implementation details.
1: Use default values
Strapping Options
© 2011 Advanced Micro Devices, Inc.
Proprietary
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