Toshiba TDP-D1 Service Manual page 96

sequential artifacts. The DDP1000 supports DC, Osram VHP and Philips UHP type lamp interfaces.
The DDP1000 offers improved support for Philips UHP lamp drivers. The DDP1000 provides 2
programmable PWM outputs that can be used for fan control or other applications.
The DDP1000 is configured over an industry standard I2C bus up to 400KHz. The Flash memory
can be reprogrammed over the I2C or the optional USB interface.
Figure 8 Single DDP1000 Architecture DMD Formatting Electronics Block Diagram
Digital Component Interface
Input Clock - CLKIN
The DDP1000 electronics requires a stable, free running input pixel clock (CLKIN) for
displaying data on the screen. GY(7:0), BU(7:0), RV(7:0), HSYNCZ, OLACT and ACTDATA
signals are sampled using the rising edge of CLKIN and they must be synchronous with CLKIN. If
CLKIN drops out or is out of specification, the DDP1000 electronics will no longer display valid
data until CLKIN is again stable. If CLKIN is not valid, signal SYNCVAL can be used to apply the
Video Curtain to the screen until CLKIN is again valid.
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