Toshiba TDP-D1 Service Manual page 93

Dlp data projector
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Clocks
The ImageProcessor requires memory (MCLK) and display (DCLK) clocks. The MCLK runs
the internal memory system and the on-chip CPU. The DCLK is used to generate the output display
timing. These clocks are typically generated by an internal PLL-based clock generator circuit. An
external crystal is required. Because the ImageProcessor is a CMOS device, the power it consumes
is proportional to the speed of the input clocks. The clock inputs to the ImageProcessor are not 5V
tolerant. In addition, during DPMS power down modes, the clocks should be slowed down or
stopped. Refer to Application Note # 15, Display Power Management (DPMS).
Display Interface
TTL
Connect TTL compatible displays directly to the ImageProcessor display port. The display port
has high current drivers to drive long traces or short cables. Use series termination near the
ImageProcessor for good EMI performance. If long cabling is required, buffer the DPort signals with
a high drive buffer.
Fan Control Interface
The Fan Control IC contains the precise digital thermometer, fan controllers, and a system-reset
circuit. The thermometer reports the temperature of 2 remote sensors and its own package. The
remote sensors are diode-connected transistors typically a low-cost, easily mounted 2N3904 NPN
type that replace conventional thermistors or thermocouples. Remote accuracy is ±5°C for multiple
transistor manufacturers, with no calibration needed. The remote channel can also measure the die
temperature of other ICs, such as microprocessors, that contain an on-chip, diode-connected
transistor.
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